GitHub - pradumnk/MIPS-CPU: A simple implementation of MIPS CPU which is 16bit single cycle. Logarithmic Barrel Shifter is added and integrated with ALU for SLL and SRL instruction in its ISA.

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A simple implementation of MIPS CPU which is 16bit single cycle. Logarithmic Barrel Shifter is added and integrated with ALU for SLL and SRL instruction in its ISA.

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Name		Name	Last commit message	Last commit date
Latest commit History 1 Commit
db		db
incremental_db		incremental_db
output_files		output_files
simulation/modelsim		simulation/modelsim
c5_pin_model_dump.txt		c5_pin_model_dump.txt
mips.qpf		mips.qpf
mips.qsf		mips.qsf
mips.v		mips.v
mips.v.bak		mips.v.bak
mips_description.txt		mips_description.txt
mips_nativelink_simulation.rpt		mips_nativelink_simulation.rpt
modified_mips.v		modified_mips.v
modified_mips.v.bak		modified_mips.v.bak

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A simple implementation of MIPS CPU which is 16bit single cycle. Logarithmic Barrel Shifter is added and integrated with ALU for SLL and SRL instruction in its ISA.

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