Implement modularization of aclint #3330
Conversation
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Can you summarize the changes and the justification in this PR thread? Is it possible to add ACLINT as a separate peripheral device, and allow user to select between CLINT and ACLINT in the Config? |
ACLINT is an "advanced" version of CLINT and can be made compatible with CLINT, and it has spec (though in draft state, and not updated for a year). I've had some prior communication with the PR author. I intend to replace CLINT with ACLINT in all the rocket-chip codebase, and only leave For end users, that might be a breaking change as the device tree will change. We may mitigate this issue by adding a compatible string
Are there cases where people really need that specific CLINT RTL instead of a compatible ACLINT? Another benefit of this is that SSWI can be implemented and will be implemented in another PR. |
Is the spec frozen? How is software support for ACLINT?
What is the justification for replacing CLINT with ACLINT in default designs?
I prefer that we allow both a) using existing CLINT, with no changes to DTS, or b) using ACLINT, with non-backwards-compatible DTS.
It depends on what software support for ACLINT looks like, and if users want to run legacy software that does not support ACLINT. Is there any problem with both |
It is not frozen, and unfortunately I do not know why. As for software support, OpenSBI has merged CLINT support to ACLINT
ACLINT can be made fully compatible with CLINT, and that can be a default config for ACLINT.
legacy code can use ACLINT just like CLINT for the above default config.
Technically no. |
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Ok. If backwards compatibility can be done, then we can just preserve the old CanHavePeripheryCLINT and CLINTKey, and add flags to CLINTParams to enable non backwards compatible features. |
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Yes, I will make modifications according to the discussion results. |
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I have encountered a problem. In order to achieve compatibility with CLINT for ACLINT, I placed the MTIMER device address in ACLINT at 0x02004000. However, in compatibility mode, the size here is 0x7ff8 (mtimecmp size)+8 (mtime size), and AddressSet (0x02004000, 0x8000-1) cannot be successfully compiled. rocket-chip/src/main/scala/diplomacy/Parameters.scala Lines 125 to 132 in 25e2c63 Here is my error message: It may be difficult to achieve backward compatibility here. |
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What does the DTS look like when using CLINT compatibility mode? |
Like this. |
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That's not the DTS |
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DTS is the json-esque thing. |
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sorry. |
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In normal Clint mode, can we also make it generate the normal CLINT DTS? I grow more convinced that we should just have separate CanHavePeripheryCLINT and CanHavePeripheryACLINT |
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In normal Clint mode, dts must grow like this because of the alignment requirements of the AddressSet.
If that's the case, I need to write different code in HasRTC and HasTile based on ACLINT or CLINT, and I need to further investigate this part. |
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Related issue: Implement modularization of aclint, which divide clint into mtimer and mswi. Type of change: feature request Impact: no functional change Development Phase: implementation Release Notes:
Here is the clint dts: |
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Here is the aclint dts: |
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Thanks for making this change, the DTS for both cases look fine for me. I'll need to review more thoroughly when I have time, but I think fundamentally this change is OK |
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Here is the no-clint dts: |
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Please squash the github-reply-to-suggestion commits into one commit. |
PorterLu
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All above cases generate properly. Here is the dts with |
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…d mswi. Co-authored-by: Hongren (Zenithal) Zheng <[email protected]> Co-authored-by: jerryz123 <[email protected]>
As the RISC-V ACLINT specification is defined to be backward compatible with the SiFive CLINT specification, we rename SiFive CLINT to RISC-V ALINT in the source tree to be future-proof. Signed-off-by: Bin Meng <[email protected]> Series-to: [email protected] Cover-letter: riscv: Add ACLINT mtimer and mswi devices support This RISC-V ACLINT specification [1] defines a set of memory mapped devices which provide inter-processor interrupts (IPI) and timer functionalities for each HART on a multi-HART RISC-V platform. This seriesl updates U-Boot existing SiFive CLINT driver to handle the ACLINT changes, and is now able to support both CLINT and ACLINT. With this series, U-Boot is able to boot on: - QEMU 'virt' machine with 'aclint=on' - Rocket Chip with ACLINT changes [2] [1] https://github.com/riscv/riscv-aclint/blob/main/riscv-aclint.adoc [2] chipsalliance/rocket-chip#3330 END
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@PorterLu, @cyyself, and we together have managed to boot Linux with OpenSBI and a patched u-boot (thanks to @lbmeng) on a dual-core Rocket with ACLINT of this branch enabled on a 7k325t FPGA. I think this suffices for testing. As for the dts issue, due to diplomacy, what rocket will generate for aclint mtimer is instead of the example in the RFC spec (https://lore.kernel.org/lkml/[email protected]/) though in practice OpenSBI and the patched u-boot worked happily. This is ready for more review. And for my part, after some minor fixes (e.g. code style, a WithACLINT option, and a config for emulator in CI), I think this can be merged. |
dtc is not too happy for changing the node name to |
As the RISC-V ACLINT specification is defined to be backward compatible with the SiFive CLINT specification, we rename SiFive CLINT to RISC-V ALINT in the source tree to be future-proof. Signed-off-by: Bin Meng <[email protected]> Reviewed-by: Rick Chen <[email protected]> Series-version: 2 Cover-letter: riscv: Add ACLINT mtimer and mswi devices support This RISC-V ACLINT specification [1] defines a set of memory mapped devices which provide inter-processor interrupts (IPI) and timer functionalities for each HART on a multi-HART RISC-V platform. This seriesl updates U-Boot existing SiFive CLINT driver to handle the ACLINT changes, and is now able to support both CLINT and ACLINT. With this series, U-Boot is able to boot on: - QEMU 'virt' machine with 'aclint=on' - Rocket Chip with ACLINT changes [2] [1] https://github.com/riscv/riscv-aclint/blob/main/riscv-aclint.adoc [2] chipsalliance/rocket-chip#3330 END
Related issue: Implement modularization of aclint, which divide clint into mtimer and mswi.
Type of change: feature request
Impact: no functional change
Development Phase: implementation
Release Notes
This PR implements the modular features in ACLINT, dividing CLINT into MTIMER and MSWI. Users can use CLINTKey to generate an ACLINT. When isACLINT is false, ACLINT will be compatible with CLINT, otherwise it will not be compatible.