RMA WG 02 14 2019

Agenda

1. Memory model discussion (Jim powerpoint experiment)
2. Wait/Test API discussion (Dave)

Attendees

• No Roll

Open Action Items

• None

New Action Items

• None

Notes

Memory Model discussion (Jim and Anshuman)

Open Questions:

1. What to do with the wait and test semantic
   1. interaction between point to point and wait especially for shmem_p
2. PCIe Spec is not clear wrt write order
3. example on slide 4 needs a quiet
   1. for ensuring completion (before next read)
   2. although progress is guaranteed without shmem calls
4. Interaction between shmem_p and atomics —> currently undefined
5. Slide 7
   1. release store == relaxed store + fence
   2. More discussions on mailing list
6. Shmem users polled like option 3, AMO and allow shmem_p
7. 2 separate proposals ?
   1. signal put
   2. signal
   3. having extra argument is not good for GPUs
   4. only requirement is atomicity of update, may not be true for shmem_p

Shmem_wait (Dave)

1. Use of Status