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merge dev into master #1026

Merged
merged 39 commits into from
Jul 13, 2024
Merged

merge dev into master #1026

merged 39 commits into from
Jul 13, 2024

Commits on Jun 4, 2024

  1. Adding formal rule for coverage holes on controller

    Yoann Pruvost committed Jun 4, 2024
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Commits on Jun 6, 2024

  1. Adding more assertions for code coverage holes in controller

    Yoann Pruvost committed Jun 6, 2024
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  2. RVFI - Correction corner case conflict on mstatus_fs upades when inte… 

    …ger load followed by fpu instr
    Yoann Pruvost committed Jun 6, 2024
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  3. Running verible

    Yoann Pruvost committed Jun 6, 2024
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  4. Merge pull request #997 from YoannPruvost/dev_formal_2 

    Adding formal rule for coverage holes on controller
    @davideschiavone
    davideschiavone authored Jun 6, 2024
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  5. Merge pull request #998 from YoannPruvost/dev_mstatus_fs_mismatch 

    RVFI - Correction corner case conflict on mstatus_fs upades when integer load followed by fpu instr
    @davideschiavone
    davideschiavone authored Jun 6, 2024
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Commits on Jun 12, 2024

  1. jasper SLEC script changes 

    Updated jasper SLEC script for parameters usage. Added assumption files and bind file scripts/slec/cadence folder.
    @mret55
    mret55 committed Jun 12, 2024
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  2. Update README.rtf 

    Added license headers
    @mret55
    mret55 authored Jun 12, 2024
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  3. Delete .DS_Store

    @mret55
    mret55 authored Jun 12, 2024
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  4. Delete scripts/.DS_Store

    @mret55
    mret55 authored Jun 12, 2024
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  5. Delete scripts/slec/.DS_Store

    @mret55
    mret55 authored Jun 12, 2024
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Commits on Jun 16, 2024

  1. Changes made to run.sh. Added a new folder for assume and bind files

    @mret55
    mret55 committed Jun 16, 2024
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  2. Merge branch 'dev' of https://github.com/mret55/cv32e40p into dev

    @mret55
    mret55 committed Jun 16, 2024
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  3. Delete scripts/slec/.DS_Store

    @mret55
    mret55 authored Jun 16, 2024
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  4. Delete scripts/.DS_Store

    @mret55
    mret55 authored Jun 16, 2024
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  5. Delete scripts/slec/cadence/.DS_Store

    @mret55
    mret55 authored Jun 16, 2024
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  6. Delete .DS_Store

    @mret55
    mret55 authored Jun 16, 2024
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Commits on Jun 17, 2024

  1. Replaced headers in assume and bind files with the ones in formal dir… 

    …. Uncommented the row4 trigger_match_i assertion from controller_assert file
    @mret55
    mret55 committed Jun 17, 2024
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  2. Merge branch 'dev' of https://github.com/mret55/cv32e40p into dev

    @mret55
    mret55 committed Jun 17, 2024
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Commits on Jun 18, 2024

  1. Merge pull request #1003 from mret55/dev 

    jasper SLEC script changes
    @MikeOpenHWGroup
    MikeOpenHWGroup authored Jun 18, 2024
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Commits on Jun 20, 2024

  1. RISC-V ISA Formal Verification files for SiemensEDA OneSpin tool. 

    Signed-off-by: Pascal Gouedo <[email protected]>
    Pascal Gouedo committed Jun 20, 2024
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  2. Added signoff report generation. 

    Signed-off-by: Pascal Gouedo <[email protected]>
    Pascal Gouedo committed Jun 20, 2024
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  3. License header addition except in json files which don't accept comme… 

    …nts.

Signed-off-by: Pascal Gouedo <[email protected]>
    Pascal Gouedo committed Jun 20, 2024
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  4. Changed Siemens EDA to Siemens and Onespin to Questa Processor. 

    Signed-off-by: Pascal Gouedo <[email protected]>
    Pascal Gouedo committed Jun 20, 2024
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Commits on Jun 21, 2024

  1. Merge pull request #1008 from pascalgouedo/dev_dd_pgo_riscv_formal 

    RISC-V ISA Formal Verification setup and script files for Siemens Questa Processor tool
    pascalgouedo authored Jun 21, 2024
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Commits on Jun 26, 2024

  1. Up-to-date files for RISC-V ISA Formal Verification. 

    Signed-off-by: Pascal Gouedo <[email protected]>
    Pascal Gouedo committed Jun 26, 2024
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Commits on Jun 27, 2024

  1. Updated PRC commands. 

    Signed-off-by: Pascal Gouedo <[email protected]>
    Pascal Gouedo committed Jun 27, 2024
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  2. Added Siemens Questa Processor version requirement. 

    Signed-off-by: Pascal Gouedo <[email protected]>
    Pascal Gouedo committed Jun 27, 2024
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Commits on Jun 28, 2024

  1. Merge pull request #1014 from pascalgouedo/dev_dd_pgo_riscv_formal 

    Up-to-date files for RISC-V ISA Formal Verification.
    pascalgouedo authored Jun 28, 2024
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Commits on Jul 3, 2024

  1. Cleanup. 

    Signed-off-by: Pascal Gouedo <[email protected]>
    Pascal Gouedo committed Jul 3, 2024
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  2. Added FPU sleep information. 

    Signed-off-by: Pascal Gouedo <[email protected]>
    Pascal Gouedo committed Jul 3, 2024
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  3. Added ASIC size numbers for different configurations. 

    Signed-off-by: Pascal Gouedo <[email protected]>
    Pascal Gouedo committed Jul 3, 2024
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  4. User Manual Verification section final version. 

    Signed-off-by: Pascal Gouedo <[email protected]>
    Pascal Gouedo committed Jul 3, 2024
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  5. Changed User Manual version to v1.8.3 

    Signed-off-by: Pascal Gouedo <[email protected]>
    Pascal Gouedo committed Jul 3, 2024
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  6. Merge pull request #1020 from pascalgouedo/dev_dd_pgo_doc 

    User Manual final updates.
    pascalgouedo authored Jul 3, 2024
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Commits on Jul 11, 2024

  1. All links updated to cv32e40p_v1.8.3 tag for the 3 target repos (core… 

    …-v-docs, cv32e40p, core-v-verif).

Signed-off-by: Pascal Gouedo <[email protected]>
    Pascal Gouedo committed Jul 11, 2024
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  2. Merge pull request #1024 from pascalgouedo/dev_dd_pgo_doc 

    All links updated to cv32e40p_v1.8.3 tag for the 3 target repos (core-v-docs, cv32e40p, core-v-verif).
    pascalgouedo authored Jul 11, 2024
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  3. core-v-docs changed to programs 

    Signed-off-by: Pascal Gouedo <[email protected]>
    Pascal Gouedo committed Jul 11, 2024
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  4. Merge pull request #1025 from pascalgouedo/dev_dd_pgo_doc 

    core-v-docs changed to programs
    pascalgouedo authored Jul 11, 2024
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