Commits

Branch selector

 master

User selector

All users

Datepicker

All time

Commit History

Commits on Aug 28, 2015

• Fixed the Virtex-7 documentation.

  Show description for 78a7130
  

  Dustin Richmond

  committed
  78a7130

Commits on Aug 26, 2015

• Fixing a bug in the RXR engines/RXC Engines that seems to only affect DE4 Gen2

  Show description for 3d3f866
  

  Dustin Richmond

  committed
  3d3f866

• Cleaning up more reset logic (no real changes)

  

  Dustin Richmond

  committed
  d6c5115

• To reduce confusion, renaming riffa.tex and riffa.pdf

  

  Dustin Richmond

  committed
  ad83ed8

• Adding BSD 3-Clause licenses to files that were missing it.

  

  Dustin Richmond

  committed
  918665a

Commits on Aug 13, 2015

• Adding updated AC701 bit files

  

  Dustin Richmond

  committed
  d2cb526

• Fixed a naming issue in the AC701 wrapper file.

  Show description for bfa63eb
  

  Dustin Richmond

  committed
  bfa63eb

• Adding missing ac701 riffa wrapper file.

  

  Dustin Richmond

  committed
  2f13ce9

Commits on Aug 12, 2015

• Finishing reset logic and testing/implementing across a wide swath of boards.

  Show description for c420b76
  

  Dustin Richmond

  committed
  c420b76

Commits on Aug 11, 2015

• Adding DE2 project files (only slightly tested)

  

  Dustin Richmond

  committed
  9d7543a

• Adding a few changes the the ML605 project.

  Show description for f836029
  

  Dustin Richmond

  committed
  f836029

• Adding AC701 projects for RIFFA 2.2.1.

  Show description for 47530ee
  

  Dustin Richmond

  committed
  47530ee

Commits on Jul 31, 2015

• Adding VERY PRELIMINARY ML605 development board files.

  

  Dustin Richmond

  committed
  e13b825

• Adding preliminary VCU108 and KCU105 projects.

  Show description for f0efc47
  

  Dustin Richmond

  committed
  f0efc47

Commits on Jul 30, 2015

• Updating 7V3 board for bug fixes, and adding preliminary support for new boards.

  Show description for f963910
  

  Dustin Richmond

  committed
  f963910

• Fixed two bugs, one in riffa.v, one in tx_data_fifo.v

  Show description for ff9d11d
  

  Dustin Richmond

  committed
  ff9d11d

Commits on Jul 29, 2015

• Fixing a bug in the tx_data_fifo where the data fifo was not large enough.

  Show description for dc93333
  

  Dustin Richmond

  committed
  dc93333

• Adding the Gen2 and Gen3 projects for the ADM 7V3 board

  

  Dustin Richmond

  committed
  d0e4df9

Commits on Jul 28, 2015

• Adding timing improvements to tx_alignment pipeline.

  Show description for 5058a75
  

  Dustin Richmond

  committed
  5058a75

Commits on Jul 27, 2015

• Adding AlphaData 7V3 project for user.

  Show description for e11eb70
  

  Dustin Richmond

  committed
  e11eb70

• Adding graceful reset logic to the RIFFA core.

  

  Dustin Richmond

  committed
  1254f44

Commits on Jul 23, 2015

• Finalized reset logic in the classic engines (see previous commit)

  

  Dustin Richmond

  committed
  924d52e

• Adding graceful reset logic to the Ultrascale TX Engines

  Show description for 31b82c1
  

  Dustin Richmond

  committed
  31b82c1

• Adding new reset_controller.v file.

  Show description for 505c72d
  

  Dustin Richmond

  committed
  505c72d

Commits on Jul 21, 2015

• Fixed a bug in RIFFA 2.2 for the Classic Xilinx 128-bit interface.

  Show description for e2f3abe
  

  Dustin Richmond

  committed
  e2f3abe

Commits on Jul 17, 2015

• Added a S_AXIS_**_TREADY Check on the reset logic in the ultrascale engines.

  

  Dustin Richmond

  committed
  5be7627

Commits on Jul 16, 2015

• Finished wiring reset logic in the Engine Layer (untested)

  Show description for ad90d61
  

  Dustin Richmond

  committed
  ad90d61

• Replaced RST_IN with RST_BUS and RST_LOGIC and addded DONE_RST in top level engine layer files.

  Show description for 5ee3747
  

  Dustin Richmond

  committed
  5ee3747

• Adding resetter.v, a new module that controls the reset logic in riffa.v.

  Show description for 744953c
  

  Dustin Richmond

  committed
  744953c

• Added a parameter C_VALUE to shiftreg.v and changed all declarations.

  Show description for d5f3ba7
  

  Dustin Richmond

  committed
  d5f3ba7

Commits on Jul 15, 2015

• Fixed a small bit-width related issue in counter.v.

  Show description for 84ebc07
  

  Dustin Richmond

  committed
  84ebc07

• Updating license headers for a few files that snuck through.

  Show description for 28fdced
  

  Dustin Richmond

  committed
  28fdced

• Fixing a two small typos in the documentation.

  Show description for 66bf96b
  

  Dustin Richmond

  committed
  66bf96b

Commits on Jul 14, 2015

• Adding RIFFA documentation files.

  Show description for 81be51c
  

  Dustin Richmond

  committed
  81be51c

Commits on Jun 22, 2015

• Adding fix for windows driver issue where consecutive small transfers can get corrupted

  

  Dustin Richmond

  committed
  8836ab9

Pagination

PreviousNext