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Darjeeling updates #57

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loiclefort
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Lots of fixes and some new features, notably:

  • better reset model (pwrmgr/rstmgr)
  • lc_ctrl DMI interface
  • fixed entropy issues when using -icount

rivos-eblot and others added 30 commits February 29, 2024 15:58
When start delay was not defined, the default value was overridden

Signed-off-by: Emmanuel Blot <[email protected]>
…mbols.

Also add an option to filter CPUs by index.

Signed-off-by: Emmanuel Blot <[email protected]>
Also rework vCPU reference

Signed-off-by: Emmanuel Blot <[email protected]>
Generation command could be scheduled by a HW app, i.e. an EDN instance
while Instantiation has not yet been completed, as the CSRNG command
response of a Generate request was interpreted by the EDN as the
completion of the Instantiate command.

Signed-off-by: Emmanuel Blot <[email protected]>
The entropy source can give wait time hints to the CSRNG so that the
latter does not uselessly poll the former while it is initializing.

Signed-off-by: Emmanuel Blot <[email protected]>
The outstanding requests were not discarded on EDN reset

Signed-off-by: Emmanuel Blot <[email protected]>
… value.

This API can be used to ensure the first time IbexIRQ is set, the new
IRQ value is propagated to the connected device. The need may arise to
forward a 0 value which is otherwise ignored as the role of IbexIRQ is
to not propagate updates with unchanged values.

Signed-off-by: Emmanuel Blot <[email protected]>
It is mandatory to wait for the vCPU to actually stop before resuming
the reset sequence. Failing to do so may lead TCG to execute a cached
TB from the new PC, updated from reset vector.

Avoid using pause_all_vcpus/resume_all_vcpus as other SoCs in the
machine should not be stopped. Moreover the virtual clock should not be
halted as other SoCs may keep running while the local reset sequence is
ran.

Avoid using qemu_system_reset_request for the same reason, which is
even more intrusive for the whole VM.

Signed-off-by: Emmanuel Blot <[email protected]>
…fetch

This extension is disabled by default.
To enable it, `fetch-ctrl` property should be set. If set, Power Manager
IRQ `OT_PWRMGR_HOLDON_FETCH` should be reset to enable the Power Manager
Fast FSM to move to the ACTIVE state.

Signed-off-by: Emmanuel Blot <[email protected]>
Reset is not a transient state but is now stateful.

Signed-off-by: Emmanuel Blot <[email protected]>
Power Manager has diverged between OpenTitan variants.

Signed-off-by: Emmanuel Blot <[email protected]>
rivos-eblot and others added 25 commits February 29, 2024 15:58
This can be useful to observe multiple UART output at once.

Signed-off-by: Emmanuel Blot <[email protected]>
Passing option "--ci" to ot-format (resp. ot-tidy) will get the list of files
to be processed from scripts/opentitan/clang-format.d/*.lst (resp.
scripts/opentitan/clang-tidy.d/*.lst)

Signed-off-by: Loïc Lefort <[email protected]>
@loiclefort loiclefort requested a review from rivos-eblot March 1, 2024 11:23
@loiclefort loiclefort self-assigned this Mar 1, 2024
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LGTM (internal review done)

@rivos-eblot rivos-eblot merged commit 363414f into lowRISC:ot-darjeeling-8.2.0 Mar 1, 2024
5 checks passed
@loiclefort loiclefort deleted the dj-update-20240301 branch March 1, 2024 11:36
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2 participants