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Membkdr

Membkdr #29841

GitHub Actions / verible-verilog-lint failed Jan 17, 2024 in 1s

reviewdog [verible-verilog-lint] report

reported by reviewdog 🐶

Findings (23)

hw/top_darjeeling/ip/ast/rtl/vcaon_pgd.sv|34 col 1| Use 'always_comb' instead of 'always @'. [Style: combinational-logic] [always-comb]
hw/top_darjeeling/dv/env/seq_lib/chip_sw_sram_ctrl_scrambled_access_vseq.sv|20 col 101| Line length exceeds max: 100; is: 114 [Style: line-length] [line-length]
hw/top_darjeeling/dv/env/seq_lib/chip_sw_sram_ctrl_scrambled_access_vseq.sv|21 col 101| Line length exceeds max: 100; is: 112 [Style: line-length] [line-length]
hw/top_darjeeling/dv/env/seq_lib/chip_sw_sleep_pin_wake_vseq.sv|116 col 101| Line length exceeds max: 100; is: 102 [Style: line-length] [line-length]
hw/top_darjeeling/dv/env/seq_lib/chip_sw_rv_core_ibex_lockstep_glitch_vseq.sv|571 col 101| Line length exceeds max: 100; is: 101 [Style: line-length] [line-length]
hw/dv/sv/mem_bkdr_util/mem_bkdr_util.sv|656 col 33| 659:46: The lines can't be continued with '', use concatenation operator with braces [Style: forbid-line-continuations] [forbid-line-continuations]
hw/dv/sv/mem_bkdr_util/mem_bkdr_util.sv|670 col 34| 672:47: The lines can't be continued with '', use concatenation operator with braces [Style: forbid-line-continuations] [forbid-line-continuations]
hw/top_darjeeling/dv/env/seq_lib/chip_sw_sensor_ctrl_status_intr_vseq.sv|19 col 101| Line length exceeds max: 100; is: 101 [Style: line-length] [line-length]
hw/top_darjeeling/dv/env/seq_lib/chip_sw_lc_ctrl_scrap_vseq.sv|34 col 9| Do not use $test$plusargs to access plusargs, use $value$plusargs instead. [Style: plusarg-value-assignment] [plusarg-assignment]
hw/top_darjeeling/dv/env/seq_lib/chip_sw_uart_rand_baudrate_vseq.sv|14 col 14| Explicitly define a storage type for every parameter and localparam, (NCO_WIDTH). [Style: constants] [explicit-parameter-storage-type]
hw/top_darjeeling/ip/ast/rtl/vio_pgd.sv|34 col 1| Use 'always_comb' instead of 'always @
'. [Style: combinational-logic] [always-comb]
hw/top_darjeeling/ip/ast/rtl/vcmain_pgd.sv|34 col 1| Use 'always_comb' instead of 'always @'. [Style: combinational-logic] [always-comb]
hw/top_darjeeling/dv/env/seq_lib/chip_sw_spi_passthrough_vseq.sv|129 col 101| Line length exceeds max: 100; is: 101 [Style: line-length] [line-length]
hw/top_darjeeling/ip/ast/rtl/vcc_pgd.sv|34 col 1| Use 'always_comb' instead of 'always @
'. [Style: combinational-logic] [always-comb]
hw/top_darjeeling/dv/env/seq_lib/chip_padctrl_attributes_vseq.sv|307 col 101| Line length exceeds max: 100; is: 101 [Style: line-length] [line-length]
hw/ip/mbx/dv/env/mbx_scoreboard.sv|54 col 101| Line length exceeds max: 100; is: 113 [Style: line-length] [line-length]
hw/ip/mbx/dv/env/mbx_scoreboard.sv|69 col 101| Line length exceeds max: 100; is: 101 [Style: line-length] [line-length]
hw/ip/mbx/dv/env/mbx_scoreboard.sv|247 col 7| Explicitly define a default case for every case statement. [Style: case-statements] [case-missing-default]
hw/ip/mbx/dv/env/mbx_scoreboard.sv|323 col 101| Line length exceeds max: 100; is: 102 [Style: line-length] [line-length]
hw/ip/mbx/dv/env/mbx_scoreboard.sv|333 col 7| Explicitly define a default case for every case statement. [Style: case-statements] [case-missing-default]
hw/ip/mbx/dv/env/mbx_scoreboard.sv|348 col 101| Line length exceeds max: 100; is: 103 [Style: line-length] [line-length]
hw/ip/lc_ctrl_v1/dv/env/seq_lib/lc_ctrl_v1_errors_vseq.sv|859 col 101| Line length exceeds max: 100; is: 102 [Style: line-length] [line-length]
hw/top_darjeeling/dv/env/seq_lib/chip_sw_power_virus_vseq.sv|160 col 101| Line length exceeds max: 100; is: 101 [Style: line-length] [line-length]

Filtered Findings (317)

hw/vendor/pulp_riscv_dbg/tb/tb_top.sv|53 col 13| Do not use $test$plusargs to access plusargs, use $value$plusargs instead. [Style: plusarg-value-assignment] [plusarg-assignment]
hw/vendor/pulp_riscv_dbg/tb/tb_top.sv|58 col 13| Do not use $test$plusargs to access plusargs, use $value$plusargs instead. [Style: plusarg-value-assignment] [plusarg-assignment]
hw/vendor/pulp_riscv_dbg/tb/tb_top.sv|71 col 16| Do not use $test$plusargs to access plusargs, use $value$plusargs instead. [Style: plusarg-value-assignment] [plusarg-assignment]
hw/vendor/pulp_riscv_dbg/tb/tb_top.sv|100 col 12| Do not use $test$plusargs to access plusargs, use $value$plusargs instead. [Style: plusarg-value-assignment] [plusarg-assignment]
hw/ip/prim/rtl/prim_flop_macros.sv|24 col 101| Line length exceeds max: 100; is: 111 [Style: line-length] [line-length]
hw/ip/prim/rtl/prim_flop_macros.sv|44 col 101| Line length exceeds max: 100; is: 164 [Style: line-length] [line-length]
hw/dv/sv/dv_base_reg/csr_excl_item.sv|15 col 5| Struct names have to end with _t [Style: struct-union-conventions] [struct-union-name-style]
hw/ip/otbn/dv/uvm/env/seq_lib/otbn_common_vseq.sv|146 col 21| 147:43: The lines can't be continued with '', use concatenation operator with braces [Style: forbid-line-continuations] [forbid-line-continuations]
hw/vendor/pulp_riscv_dbg/src/dmi_intf.sv|9 col 11| Interface names must use lower_snake_case naming convention and end with _if. [Style: interface-conventions] [interface-name-style]
hw/ip/flash_ctrl/dv/env/seq_lib/flash_ctrl_hw_sec_otp_vseq.sv|309 col 101| Line length exceeds max: 100; is: 104 [Style: line-length] [line-length]
hw/vendor/lowrisc_ibex/vendor/google_riscv-dv/src/isa/riscv_csr_instr.sv|49 col 14| Constraint names must by styled with lower_snake_case and end with _c. [Style: constraints] [constraint-name-style]
hw/vendor/lowrisc_ibex/vendor/google_riscv-dv/src/isa/riscv_csr_instr.sv|55 col 14| Constraint names must by styled with lower_snake_case and end with _c. [Style: constraints] [constraint-name-style]
hw/vendor/lowrisc_ibex/vendor/google_riscv-dv/src/isa/riscv_csr_instr.sv|61 col 14| Constraint names must by styled with lower_snake_case and end with _c. [Style: constraints] [constraint-name-style]
hw/vendor/lowrisc_ibex/vendor/google_riscv-dv/src/isa/riscv_csr_instr.sv|67 col 14| Constraint names must by styled with lower_snake_case and end with _c. [Style: constraints] [constraint-name-style]
hw/vendor/lowrisc_ibex/vendor/google_riscv-dv/src/isa/riscv_csr_instr.sv|112 col 101| Line length exceeds max: 100; is: 136 [Style: line-length] [line-length]
hw/top_earlgrey/ip/ast/rtl/vcaon_pgd.sv|34 col 1| Use 'always_comb' instead of 'always @'. [Style: combinational-logic] [always-comb]
hw/ip/clkmgr/dv/env/clkmgr_scoreboard.sv|196 col 101| Line length exceeds max: 100; is: 106 [Style: line-length] [line-length]
hw/ip/clkmgr/dv/env/clkmgr_scoreboard.sv|202 col 101| Line length exceeds max: 100; is: 116 [Style: line-length] [line-length]
hw/ip/clkmgr/dv/env/clkmgr_scoreboard.sv|208 col 101| Line length exceeds max: 100; is: 116 [Style: line-length] [line-length]
hw/ip/clkmgr/dv/env/clkmgr_scoreboard.sv|213 col 101| Line length exceeds max: 100; is: 110 [Style: line-length] [line-length]
hw/ip/clkmgr/dv/env/clkmgr_scoreboard.sv|218 col 101| Line length exceeds max: 100; is: 108 [Style: line-length] [line-length]
hw/vendor/pulp_riscv_dbg/sva/dm_top_sva.sv|57 col 5| All generate block statements must have a label [Style: generate-statements] [generate-label]
hw/vendor/pulp_riscv_dbg/sva/dm_top_sva.sv|60 col 101| Line length exceeds max: 100; is: 133 [Style: line-length] [line-length]
hw/vendor/pulp_riscv_dbg/sva/dm_top_sva.sv|61 col 101| Line length exceeds max: 100; is: 149 [Style: line-length] [line-length]
hw/dv/sv/spi_agent/spi_agent_cfg.sv|115 col 7| Explicitly define a default case for every case statement. [Style: case-statements] [case-missing-default]
hw/dv/sv/csrng_agent/csrng_agent.sv|40 col 101| Line length exceeds max: 100; is: 101 [Style: line-length] [line-length]
hw/ip/spi_device/dv/env/seq_lib/spi_device_txrx_vseq.sv|161 col 33| 162:49: The lines can't be continued with '', use concatenation operator with braces [Style: forbid-line-continuations] [forbid-line-continuations]
hw/ip/otbn/pre_sca/alma/rtl/ram_1p.v|9 col 13| Explicitly define a storage type for every parameter and localparam, (DataWidth). [Style: constants] [explicit-parameter-storage-type]
hw/ip/otbn/pre_sca/alma/rtl/ram_1p.v|10 col 13| Explicitly define a storage type for every parameter and localparam, (AddrWidth). [Style: constants] [explicit-parameter-storage-type]
hw/ip/otbn/pre_sca/alma/rtl/ram_1p.v|11 col 13| Explicitly define a storage type for every parameter and localparam, (Depth). [Style: constants] [explicit-parameter-storage-type]
hw/ip/otbn/pre_sca/alma/rtl/ram_1p.v|24 col 27| Unpacked dimension range must be declared in big-endian ([0:N-1]) order. Declare zero-based big-endian unpacked dimensions sized as [N]. [Style: unpacked-ordering] [unpacked-dimensions-range-ordering]
hw/ip/pattgen/dv/env/pattgen_scoreboard.sv|21 col 41| Unpacked dimension range must be declared in big-endian ([0:N-1]) order. Declare zero-based big-endian unpacked dimensions sized as [N]. [Style: unpacked-ordering] [unpacked-dimensions-range-ordering]
hw/ip/uart/dv/env/seq_lib/uart_intr_vseq.sv|54 col 7| Explicitly define a default case for every case statement. [Style: case-statements] [case-missing-default]
hw/ip/otbn/pre_sca/alma/rtl/otbn_top_coco.v|7 col 13| Explicitly define a storage type for every parameter and localparam, (ImemDataWidth). [Style: constants] [explicit-parameter-storage-type]
hw/ip/otbn/pre_sca/alma/rtl/otbn_top_coco.v|9 col 13| Explicitly define a storage type for every parameter and localparam, (WLEN). [Style: constants] [explicit-parameter-storage-type]
hw/ip/otbn/pre_sca/alma/rtl/otbn_top_coco.v|11 col 13| Explicitly define a storage type for every parameter and localparam, (SideloadKeyWidth). [Style: constants] [explicit-parameter-storage-type]
hw/ip/otbn/pre_sca/alma/rtl/otbn_top_coco.v|25 col 14| Explicitly define a storage type for every parameter and localparam, (ImemSizeByte). [Style: constants] [explicit-parameter-storage-type]
hw/ip/otbn/pre_sca/alma/rtl/otbn_top_coco.v|27 col 14| Explicitly define a storage type for every parameter and localparam, (DmemSizeByte). [Style: constants] [explicit-parameter-storage-type]
hw/ip/otbn/pre_sca/alma/rtl/otbn_top_coco.v|29 col 14| Explicitly define a storage type for every parameter and localparam, (ExtWLEN). [Style: constants] [explicit-parameter-storage-type]
hw/ip/otbn/pre_sca/alma/rtl/otbn_top_coco.v|55 col 14| Explicitly define a storage type for every parameter and localparam, (ImemAddrWidth). [Style: constants] [explicit-parameter-storage-type]
hw/ip/otbn/pre_sca/alma/rtl/otbn_top_coco.v|57 col 14| Explicitly define a storage type for every parameter and localparam, (DmemAddrWidth). [Style: constants] [explicit-parameter-storage-type]
hw/ip/otbn/pre_sca/alma/rtl/otbn_top_coco.v|91 col 20| Explicitly define a storage type for every parameter and localparam, (MuBi4False). [Style: constants] [explicit-parameter-storage-type]
hw/ip/otbn/pre_sca/alma/rtl/otbn_top_coco.v|195 col 14| Explicitly define a storage type for every parameter and localparam, (DmemSizeWords). [Style: constants] [explicit-parameter-storage-type]
hw/ip/otbn/pre_sca/alma/rtl/otbn_top_coco.v|196 col 14| Explicitly define a storage type for every parameter and localparam, (DmemIndexWidth). [Style: constants] [explicit-parameter-storage-type]
hw/ip/otbn/pre_sca/alma/rtl/otbn_top_coco.v|222 col 14| Explicitly define a storage type for every parameter and localparam, (ImemSizeWords). [Style: constants] [explicit-parameter-storage-type]
hw/ip/otbn/pre_sca/alma/rtl/otbn_top_coco.v|223 col 14| Explicitly define a storage type for every parameter and localparam, (ImemIndexWidth). [Style: constants] [explicit-parameter-storage-type]
hw/vendor/lowrisc_ibex/vendor/google_riscv-dv/test/riscv_instr_cov_test.sv|67 col 101| Line length exceeds max: 100; is: 103 [Style: line-length] [line-length]
hw/vendor/lowrisc_ibex/vendor/google_riscv-dv/test/riscv_instr_cov_test.sv|119 col 9| Do not use $test$plusargs to access plusargs, use $value$plusargs instead. [Style: plusarg-value-assignment] [plusarg-assignment]
hw/vendor/lowrisc_ibex/dv/uvm/core_ibex/env/core_ibex_scoreboard.sv|105 col 101| Line length exceeds max: 100; is: 111 [Style: line-length] [line-length]
hw/vendor/lowrisc_ibex/dv/uvm/icache/dv/fcov/ibex_icache_fcov_if.sv|242 col 31| All generate block statements must have a label [Style: generate-statements] [generate-label]
hw/vendor/lowrisc_ibex/dv/uvm/icache/dv/fcov/ibex_icache_fcov_if.sv|245 col 16| All generate block statements must have a label [Style: generate-statements] [generate-label]
hw/vendor/lowrisc_ibex/dv/uvm/core_ibex/tests/core_ibex_vseq.sv|55 col 70| The 'name' argument of type_id::create() must match the name of the variable to which it is assigned: irq_raise_single_seq_h, got: "irq_single_seq_h". [Style: uvm-naming] [create-object-name-match]
hw/ip/rom_ctrl/dv/env/rom_ctrl_scoreboard.sv|145 col 101| Line length exceeds max: 100; is: 112 [Style: line-length] [line-length]
hw/ip/prim/pre_dv/prim_sync_reqack/rtl/prim_sync_reqack_tb.sv|30 col 101| Line length exceeds max: 100; is: 115 [Style: line-length] [line-length]
hw/ip/prim/pre_dv/prim_sync_reqack/rtl/prim_sync_reqack_tb.sv|111 col 13| $random is a forbidden system function or task, please use $urandom instead [Style: forbidden-system-functions] [invalid-system-task-function]
hw/vendor/lowrisc_ibex/vendor/google_riscv-dv/src/riscv_instr_gen_config.sv|173 col 101| Line length exceeds max: 100; is: 168 [Style: line-length] [line-length]
hw/vendor/lowrisc_ibex/vendor/google_riscv-dv/src/riscv_instr_gen_config.sv|176 col 101| Line length exceeds max: 100; is: 102 [Style: line-length] [line-length]
hw/ip/tlul/generic_dv/env/seq_lib/xbar_stress_all_with_rand_reset_vseq.sv|29 col 61| The 'name' argument of type_id::create() must match the name of the variable to which it is assigned: xbar_vseq, got: "xbar_stress_all_vseq". [Style: uvm-naming] [create-object-name-match]
hw/ip/aes/dv/env/aes_message_item.sv|50 col 101| Line length exceeds max: 100; is: 122 [Style: line-length] [line-length]
hw/ip/aes/dv/env/aes_message_item.sv|237 col 101| Line length exceeds max: 100; is: 108 [Style: line-length] [line-length]
hw/ip/aes/dv/env/aes_message_item.sv|281 col 101| Line length exceeds max: 100; is: 113 [Style: line-length] [line-length]
hw/vendor/lowrisc_ibex/dv/uvm/core_ibex/env/core_ibex_instr_monitor_if.sv|10 col 13| Explicitly define a storage type for every parameter and localparam, (DATA_WIDTH). [Style: constants] [explicit-parameter-storage-type]
hw/vendor/pulp_riscv_dbg/src/dmi_test.sv|337 col 11| File must end with a newline. [Style: posix-file-endings] [posix-eof]
hw/ip/spi_device/pre_dv/tb/spi_tpm_tb.sv|199 col 8| Explicitly define static or automatic lifetime for non-class tasks [Style: function-task-explicit-lifetime] [explicit-task-lifetime]
hw/ip/spi_device/pre_dv/tb/spi_tpm_tb.sv|253 col 8| Explicitly define static or automatic lifetime for non-class tasks [Style: function-task-explicit-lifetime] [explicit-task-lifetime]
hw/ip/spi_device/pre_dv/tb/spi_tpm_tb.sv|275 col 8| Explicitly define static or automatic lifetime for non-class tasks [Style: function-task-explicit-lifetime] [explicit-task-lifetime]
hw/ip/spi_device/pre_dv/tb/spi_tpm_tb.sv|313 col 8| Explicitly define static or automatic lifetime for non-class tasks [Style: function-task-explicit-lifetime] [explicit-task-lifetime]
hw/ip/spi_device/pre_dv/tb/spi_tpm_tb.sv|345 col 8| Explicitly define static or automatic lifetime for non-class tasks [Style: function-task-explicit-lifetime] [explicit-task-lifetime]
hw/ip/spi_device/pre_dv/tb/spi_tpm_tb.sv|357 col 8| Explicitly define static or automatic lifetime for non-class tasks [Style: function-task-explicit-lifetime] [explicit-task-lifetime]
hw/ip/spi_device/pre_dv/tb/spi_tpm_tb.sv|367 col 8| Explicitly define static or automatic lifetime for non-class tasks [Style: function-task-explicit-lifetime] [explicit-task-lifetime]
hw/ip/spi_device/pre_dv/tb/spi_tpm_tb.sv|372 col 8| Explicitly define static or automatic lifetime for non-class tasks [Style: function-task-explicit-lifetime] [explicit-task-lifetime]
hw/ip/spi_device/pre_dv/tb/spi_tpm_tb.sv|383 col 8| Explicitly define static or automatic lifetime for non-class tasks [Style: function-task-explicit-lifetime] [explicit-task-lifetime]
hw/ip/spi_device/pre_dv/tb/spi_tpm_tb.sv|413 col 9| Explicitly define a default case for every case statement. [Style: case-statements] [case-missing-default]
hw/ip/spi_device/pre_dv/tb/spi_tpm_tb.sv|436 col 8| Explicitly define static or automatic lifetime for non-class tasks [Style: function-task-explicit-lifetime] [explicit-task-lifetime]
hw/ip/spi_device/pre_dv/tb/spi_tpm_tb.sv|437 col 28| Explicitly define a storage type for every function parameter. [Style: function-task-argument-types] [explicit-function-task-parameter-type]
hw/ip/spi_device/pre_dv/tb/spi_tpm_tb.sv|450 col 8| Explicitly define static or automatic lifetime for non-class tasks [Style: function-task-explicit-lifetime] [explicit-task-lifetime]
hw/ip/spi_device/pre_dv/tb/spi_tpm_tb.sv|451 col 27| Explicitly define a storage type for every function parameter. [Style: function-task-argument-types] [explicit-function-task-parameter-type]
hw/ip/spi_device/pre_dv/tb/spi_tpm_tb.sv|464 col 8| Explicitly define static or automatic lifetime for non-class tasks [Style: function-task-explicit-lifetime] [explicit-task-lifetime]
hw/ip/spi_device/pre_dv/tb/spi_tpm_tb.sv|466 col 23| Explicitly define a storage type for every function parameter. [Style: function-task-argument-types] [explicit-function-task-parameter-type]
hw/ip/aes/dv/env/seq_lib/aes_wake_up_vseq.sv|14 col 101| Line length exceeds max: 100; is: 122 [Style: line-length] [line-length]
hw/ip/aes/dv/env/seq_lib/aes_wake_up_vseq.sv|33 col 101| Line length exceeds max: 100; is: 143 [Style: line-length] [line-length]
hw/ip/aes/dv/env/seq_lib/aes_wake_up_vseq.sv|56 col 101| Line length exceeds max: 100; is: 142 [Style: line-length] [line-length]
hw/ip/aes/dv/env/seq_lib/aes_wake_up_vseq.sv|72 col 101| Line length exceeds max: 100; is: 120 [Style: line-length] [line-length]
hw/ip/aes/dv/env/seq_lib/aes_wake_up_vseq.sv|80 col 101| Line length exceeds max: 100; is: 107 [Style: line-length] [line-length]
hw/ip/prim/fpv/tb/prim_keccak_tb.sv|69 col 101| Line length exceeds max: 100; is: 106 [Style: line-length] [line-length]
hw/vendor/pulp_riscv_dbg/tb/boot_rom.sv|21 col 29| Non-type localparam names must be styled with CamelCase or ALL_CAPS [Style: constants] [parameter-name-style]
hw/dv/dpi/gpiodpi/gpiodpi.sv|8 col 20| Explicitly define a storage type for every parameter and localparam, (N_GPIO). [Style: constants] [explicit-parameter-storage-type]
hw/dv/dpi/gpiodpi/gpiodpi.sv|23 col 72| Explicitly define a storage type for every function parameter. [Style: function-task-argument-types] [explicit-function-task-parameter-type]
hw/dv/dpi/gpiodpi/gpiodpi.sv|24 col 53| Explicitly define a storage type for every function parameter. [Style: function-task-argument-types] [explicit-function-task-parameter-type]
hw/dv/dpi/gpiodpi/gpiodpi.sv|31 col 57| Explicitly define a storage type for every function parameter. [Style: function-task-argument-types] [explicit-function-task-parameter-type]
hw/dv/dpi/gpiodpi/gpiodpi.sv|32 col 57| Explicitly define a storage type for every function parameter. [Style: function-task-argument-types] [explicit-function-task-parameter-type]
hw/dv/dpi/gpiodpi/gpiodpi.sv|33 col 57| Explicitly define a storage type for every function parameter. [Style: function-task-argument-types] [explicit-function-task-parameter-type]
hw/ip/kmac/dv/env/seq_lib/kmac_base_vseq.sv|870 col 101| Line length exceeds max: 100; is: 110 [Style: line-length] [line-length]
hw/top_earlgrey/dv/env/seq_lib/chip_sw_uart_rand_baudrate_vseq.sv|14 col 14| Explicitly define a storage type for every parameter and localparam, (NCO_WIDTH). [Style: constants] [explicit-parameter-storage-type]
hw/dv/sv/csrng_agent/csrng_item.sv|21 col 14| Constraint names must by styled with lower_snake_case and end with _c. [Style: constraints] [constraint-name-style]
hw/dv/sv/csrng_agent/csrng_item.sv|25 col 14| Constraint names must by styled with lower_snake_case and end with _c. [Style: constraints] [constraint-name-style]
hw/dv/sv/csrng_agent/csrng_item.sv|30 col 14| Constraint names must by styled with lower_snake_case and end with _c. [Style: constraints] [constraint-name-style]
hw/dv/sv/csrng_agent/csrng_item.sv|34 col 14| Constraint names must by styled with lower_snake_case and end with _c. [Style: constraints] [constraint-name-style]
hw/vendor/lowrisc_ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf.sv|5 col 11| Interface names must use lower_snake_case naming convention and end with _if. [Style: interface-conventions] [interface-name-style]
hw/top_earlgrey/dv/env/seq_lib/chip_padctrl_attributes_vseq.sv|256 col 101| Line length exceeds max: 100; is: 101 [Style: line-length] [line-length]
hw/top_earlgrey/dv/env/seq_lib/chip_sw_sram_ctrl_scrambled_access_vseq.sv|20 col 101| Line length exceeds max: 100; is: 110 [Style: line-length] [line-length]
hw/top_earlgrey/dv/env/seq_lib/chip_sw_sram_ctrl_scrambled_access_vseq.sv|21 col 101| Line length exceeds max: 100; is: 108 [Style: line-length] [line-length]
hw/dv/sv/cip_lib/seq_lib/cip_base_vseq.sv|5 col 9| Macro names must contain only CAPITALS, underscores, and digits. Exception: UVM-like macros. [Style: defines] [macro-name-style]
hw/dv/sv/cip_lib/seq_lib/cip_base_vseq.sv|237 col 101| Line length exceeds max: 100; is: 109 [Style: line-length] [line-length]
hw/dv/sv/cip_lib/seq_lib/cip_base_vseq.sv|246 col 101| Line length exceeds max: 100; is: 110 [Style: line-length] [line-length]
hw/dv/sv/cip_lib/seq_lib/cip_base_vseq.sv|247 col 101| Line length exceeds max: 100; is: 101 [Style: line-length] [line-length]
hw/ip/aes/dv/env/seq_lib/aes_alert_reset_vseq.sv|34 col 21| randomize() is forbidden within void casts [Style: void-casts] [void-cast]
hw/vendor/lowrisc_ibex/dv/uvm/icache/dv/ibex_icache_mem_agent/ibex_icache_mem_resp_item.sv|29 col 14| Constraint names must by styled with lower_snake_case and end with _c. [Style: constraints] [constraint-name-style]
hw/vendor/lowrisc_ibex/dv/uvm/icache/dv/ibex_icache_mem_agent/ibex_icache_mem_resp_item.sv|39 col 14| Constraint names must by styled with lower_snake_case and end with _c. [Style: constraints] [constraint-name-style]
hw/ip/otbn/dv/uvm/env/seq_lib/otbn_base_vseq.sv|333 col 33| Explicitly define a storage type for every function parameter. [Style: function-task-argument-types] [explicit-function-task-parameter-type]
hw/ip/spi_device/pre_dv/tb/spid_common.sv|589 col 9| Explicitly define a default case for every case statement. [Style: case-statements] [case-missing-default]
hw/ip/spi_device/pre_dv/tb/spid_common.sv|652 col 7| Explicitly define a default case for every case statement. [Style: case-statements] [case-missing-default]
hw/ip/spi_device/pre_dv/tb/spid_common.sv|711 col 7| Explicitly define a default case for every case statement. [Style: case-statements] [case-missing-default]
hw/top_earlgrey/ip/ast/rtl/vio_pgd.sv|34 col 1| Use 'always_comb' instead of 'always @
'. [Style: combinational-logic] [always-comb]
hw/vendor/pulp_riscv_dbg/tb/jtag_dmi/jtag_intf.sv|5 col 11| Interface names must use lower_snake_case naming convention and end with _if. [Style: interface-conventions] [interface-name-style]
hw/ip/otbn/dv/verilator/otbn_top_sim.sv|503 col 101| Line length exceeds max: 100; is: 103 [Style: line-length] [line-length]
hw/vendor/pulp_riscv_dbg/src/dmi_bscane_tap.sv|14 col 8| Declared module does not match the first dot-delimited component of file name: "dmi_bscane_tap" [Style: file-names] [module-filename]
hw/ip/pattgen/dv/env/pattgen_env_cfg.sv|11 col 1| Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
hw/ip/pattgen/dv/env/pattgen_env_cfg.sv|18 col 1| Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
hw/vendor/lowrisc_ibex/vendor/google_riscv-dv/src/riscv_load_store_instr_lib.sv|606 col 101| Line length exceeds max: 100; is: 101 [Style: line-length] [line-length]
hw/vendor/lowrisc_ibex/vendor/google_riscv-dv/src/riscv_load_store_instr_lib.sv|620 col 7| Explicitly define a default case for every case statement. [Style: case-statements] [case-missing-default]
hw/vendor/lowrisc_ibex/vendor/google_riscv-dv/src/riscv_load_store_instr_lib.sv|639 col 7| Explicitly define a default case for every case statement. [Style: case-statements] [case-missing-default]
hw/vendor/lowrisc_ibex/dv/uvm/core_ibex/riscv_dv_extension/ibex_directed_instr_lib.sv|354 col 23| Binary literal 32'b10000111 has less digits than expected for 32 bits. [Style: number-literals] [undersized-binary-literal]
hw/ip/otbn/dv/uvm/env/otbn_loop_if.sv|151 col 25| Explicitly define static or automatic lifetime for non-class functions [Style: function-task-explicit-lifetime] [explicit-function-lifetime]
hw/ip/otbn/dv/uvm/env/otbn_loop_if.sv|160 col 25| Explicitly define static or automatic lifetime for non-class functions [Style: function-task-explicit-lifetime] [explicit-function-lifetime]
hw/vendor/lowrisc_ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv|73 col 7| Explicitly define a default case for every case statement. [Style: case-statements] [case-missing-default]
hw/vendor/lowrisc_ibex/dv/uvm/icache/dv/ibex_icache_core_agent/ibex_icache_core_protocol_checker.sv|13 col 11| Interface names must use lower_snake_case naming convention and end with _if. [Style: interface-conventions] [interface-name-style]
hw/ip/spi_device/dv/env/seq_lib/spi_device_base_vseq.sv|359 col 7| Explicitly define a default case for every case statement. [Style: case-statements] [case-missing-default]
hw/ip/spi_device/dv/env/seq_lib/spi_device_base_vseq.sv|384 col 7| Explicitly define a default case for every case statement. [Style: case-statements] [case-missing-default]
hw/dv/sv/pattgen_agent/pattgen_agent_cfg.sv|15 col 15| Unpacked dimension range must be declared in big-endian ([0:N-1]) order. Declare zero-based big-endian unpacked dimensions sized as [N]. [Style: unpacked-ordering] [unpacked-dimensions-range-ordering]
hw/vendor/lowrisc_ibex/dv/uvm/icache/dv/tb/tb.sv|230 col 101| Line length exceeds max: 100; is: 108 [Style: line-length] [line-length]
hw/ip/sram_ctrl/dv/env/sram_ctrl_scoreboard.sv|31 col 5| Enum names must use lower_snake_case naming convention and end with _t or _e. [Style: enumerations] [enum-name-style]
hw/ip/aes/dv/env/aes_seq_item.sv|237 col 101| Line length exceeds max: 100; is: 102 [Style: line-length] [line-length]
hw/ip/aes/dv/env/aes_seq_item.sv|242 col 101| Line length exceeds max: 100; is: 102 [Style: line-length] [line-length]
hw/ip/aes/dv/env/aes_seq_item.sv|247 col 101| Line length exceeds max: 100; is: 102 [Style: line-length] [line-length]
hw/ip/aes/dv/env/aes_seq_item.sv|252 col 101| Line length exceeds max: 100; is: 102 [Style: line-length] [line-length]
hw/ip/aes/dv/env/aes_seq_item.sv|331 col 18| $psprintf is a forbidden system function or task, please use $sformatf instead [Style: forbidden-system-functions] [invalid-system-task-function]
hw/ip/aes/dv/env/aes_seq_item.sv|333 col 18| $psprintf is a forbidden system function or task, please use $sformatf instead [Style: forbidden-system-functions] [invalid-system-task-function]
hw/ip/aes/dv/env/aes_seq_item.sv|335 col 18| $psprintf is a forbidden system function or task, please use $sformatf instead [Style: forbidden-system-functions] [invalid-system-task-function]
hw/ip/aes/dv/env/aes_seq_item.sv|337 col 18| $psprintf is a forbidden system function or task, please use $sformatf instead [Style: forbidden-system-functions] [invalid-system-task-function]
hw/ip/aes/dv/env/aes_seq_item.sv|339 col 18| $psprintf is a forbidden system function or task, please use $sformatf instead [Style: forbidden-system-functions] [invalid-system-task-function]
hw/ip/aes/dv/env/aes_seq_item.sv|339 col 101| Line length exceeds max: 100; is: 102 [Style: line-length] [line-length]
hw/ip/aes/dv/env/aes_seq_item.sv|340 col 101| Line length exceeds max: 100; is: 104 [Style: line-length] [line-length]
hw/ip/aes/dv/env/aes_seq_item.sv|341 col 18| $psprintf is a forbidden system function or task, please use $sformatf instead [Style: forbidden-system-functions] [invalid-system-task-function]
hw/ip/aes/dv/env/aes_seq_item.sv|343 col 19| $psprintf is a forbidden system function or task, please use $sformatf instead [Style: forbidden-system-functions] [invalid-system-task-function]
hw/ip/aes/dv/env/aes_seq_item.sv|345 col 18| $psprintf is a forbidden system function or task, please use $sformatf instead [Style: forbidden-system-functions] [invalid-system-task-function]
hw/ip/aes/dv/env/aes_seq_item.sv|347 col 19| $psprintf is a forbidden system function or task, please use $sformatf instead [Style: forbidden-system-functions] [invalid-system-task-function]
hw/ip/aes/dv/env/aes_seq_item.sv|353 col 18| $psprintf is a forbidden system function or task, please use $sformatf instead [Style: forbidden-system-functions] [invalid-system-task-function]
hw/ip/aes/dv/env/aes_seq_item.sv|354 col 18| $psprintf is a forbidden system function or task, please use $sformatf instead [Style: forbidden-system-functions] [invalid-system-task-function]
hw/ip/aes/dv/env/aes_seq_item.sv|355 col 18| $psprintf is a forbidden system function or task, please use $sformatf instead [Style: forbidden-system-functions] [invalid-system-task-function]
... (Too many findings. Dropped some findings)

Annotations

Check warning on line 34 in hw/top_darjeeling/ip/ast/rtl/vcaon_pgd.sv

See this annotation in the file changed.

@github-actions github-actions / verible-verilog-lint

[verible-verilog-lint] hw/top_darjeeling/ip/ast/rtl/vcaon_pgd.sv#L34

Use 'always_comb' instead of 'always @*'. [Style: combinational-logic] [always-comb]
Raw output
message:"Use 'always_comb' instead of 'always @*'. [Style: combinational-logic] [always-comb]"  location:{path:"./hw/top_darjeeling/ip/ast/rtl/vcaon_pgd.sv"  range:{start:{line:34  column:1}}}  severity:WARNING  source:{name:"verible-verilog-lint"  url:"https://github.com/chipsalliance/verible"}

Check warning on line 20 in hw/top_darjeeling/dv/env/seq_lib/chip_sw_sram_ctrl_scrambled_access_vseq.sv

See this annotation in the file changed.

@github-actions github-actions / verible-verilog-lint

[verible-verilog-lint] hw/top_darjeeling/dv/env/seq_lib/chip_sw_sram_ctrl_scrambled_access_vseq.sv#L20

Line length exceeds max: 100; is: 114 [Style: line-length] [line-length]
Raw output
message:"Line length exceeds max: 100; is: 114 [Style: line-length] [line-length]"  location:{path:"./hw/top_darjeeling/dv/env/seq_lib/chip_sw_sram_ctrl_scrambled_access_vseq.sv"  range:{start:{line:20  column:101}}}  severity:WARNING  source:{name:"verible-verilog-lint"  url:"https://github.com/chipsalliance/verible"}

Check warning on line 21 in hw/top_darjeeling/dv/env/seq_lib/chip_sw_sram_ctrl_scrambled_access_vseq.sv

See this annotation in the file changed.

@github-actions github-actions / verible-verilog-lint

[verible-verilog-lint] hw/top_darjeeling/dv/env/seq_lib/chip_sw_sram_ctrl_scrambled_access_vseq.sv#L21

Line length exceeds max: 100; is: 112 [Style: line-length] [line-length]
Raw output
message:"Line length exceeds max: 100; is: 112 [Style: line-length] [line-length]"  location:{path:"./hw/top_darjeeling/dv/env/seq_lib/chip_sw_sram_ctrl_scrambled_access_vseq.sv"  range:{start:{line:21  column:101}}}  severity:WARNING  source:{name:"verible-verilog-lint"  url:"https://github.com/chipsalliance/verible"}

Check warning on line 116 in hw/top_darjeeling/dv/env/seq_lib/chip_sw_sleep_pin_wake_vseq.sv

See this annotation in the file changed.

@github-actions github-actions / verible-verilog-lint

[verible-verilog-lint] hw/top_darjeeling/dv/env/seq_lib/chip_sw_sleep_pin_wake_vseq.sv#L116

Line length exceeds max: 100; is: 102 [Style: line-length] [line-length]
Raw output
message:"Line length exceeds max: 100; is: 102 [Style: line-length] [line-length]"  location:{path:"./hw/top_darjeeling/dv/env/seq_lib/chip_sw_sleep_pin_wake_vseq.sv"  range:{start:{line:116  column:101}}}  severity:WARNING  source:{name:"verible-verilog-lint"  url:"https://github.com/chipsalliance/verible"}

Check warning on line 571 in hw/top_darjeeling/dv/env/seq_lib/chip_sw_rv_core_ibex_lockstep_glitch_vseq.sv

See this annotation in the file changed.

@github-actions github-actions / verible-verilog-lint

[verible-verilog-lint] hw/top_darjeeling/dv/env/seq_lib/chip_sw_rv_core_ibex_lockstep_glitch_vseq.sv#L571

Line length exceeds max: 100; is: 101 [Style: line-length] [line-length]
Raw output
message:"Line length exceeds max: 100; is: 101 [Style: line-length] [line-length]"  location:{path:"./hw/top_darjeeling/dv/env/seq_lib/chip_sw_rv_core_ibex_lockstep_glitch_vseq.sv"  range:{start:{line:571  column:101}}}  severity:WARNING  source:{name:"verible-verilog-lint"  url:"https://github.com/chipsalliance/verible"}

Check warning on line 656 in hw/dv/sv/mem_bkdr_util/mem_bkdr_util.sv

See this annotation in the file changed.

@github-actions github-actions / verible-verilog-lint

[verible-verilog-lint] hw/dv/sv/mem_bkdr_util/mem_bkdr_util.sv#L656

659:46: The lines can't be continued with '\', use concatenation operator with braces [Style: forbid-line-continuations] [forbid-line-continuations]
Raw output
message:"659:46: The lines can't be continued with '\\', use concatenation operator with braces [Style: forbid-line-continuations] [forbid-line-continuations]"  location:{path:"./hw/dv/sv/mem_bkdr_util/mem_bkdr_util.sv"  range:{start:{line:656  column:33}}}  severity:WARNING  source:{name:"verible-verilog-lint"  url:"https://github.com/chipsalliance/verible"}

Check warning on line 670 in hw/dv/sv/mem_bkdr_util/mem_bkdr_util.sv

See this annotation in the file changed.

@github-actions github-actions / verible-verilog-lint

[verible-verilog-lint] hw/dv/sv/mem_bkdr_util/mem_bkdr_util.sv#L670

672:47: The lines can't be continued with '\', use concatenation operator with braces [Style: forbid-line-continuations] [forbid-line-continuations]
Raw output
message:"672:47: The lines can't be continued with '\\', use concatenation operator with braces [Style: forbid-line-continuations] [forbid-line-continuations]"  location:{path:"./hw/dv/sv/mem_bkdr_util/mem_bkdr_util.sv"  range:{start:{line:670  column:34}}}  severity:WARNING  source:{name:"verible-verilog-lint"  url:"https://github.com/chipsalliance/verible"}

Check warning on line 19 in hw/top_darjeeling/dv/env/seq_lib/chip_sw_sensor_ctrl_status_intr_vseq.sv

See this annotation in the file changed.

@github-actions github-actions / verible-verilog-lint

[verible-verilog-lint] hw/top_darjeeling/dv/env/seq_lib/chip_sw_sensor_ctrl_status_intr_vseq.sv#L19

Line length exceeds max: 100; is: 101 [Style: line-length] [line-length]
Raw output
message:"Line length exceeds max: 100; is: 101 [Style: line-length] [line-length]"  location:{path:"./hw/top_darjeeling/dv/env/seq_lib/chip_sw_sensor_ctrl_status_intr_vseq.sv"  range:{start:{line:19  column:101}}}  severity:WARNING  source:{name:"verible-verilog-lint"  url:"https://github.com/chipsalliance/verible"}

Check warning on line 34 in hw/top_darjeeling/dv/env/seq_lib/chip_sw_lc_ctrl_scrap_vseq.sv

See this annotation in the file changed.

@github-actions github-actions / verible-verilog-lint

[verible-verilog-lint] hw/top_darjeeling/dv/env/seq_lib/chip_sw_lc_ctrl_scrap_vseq.sv#L34

Do not use $test$plusargs to access plusargs, use $value$plusargs instead. [Style: plusarg-value-assignment] [plusarg-assignment]
Raw output
message:"Do not use $test$plusargs to access plusargs, use $value$plusargs instead. [Style: plusarg-value-assignment] [plusarg-assignment]"  location:{path:"./hw/top_darjeeling/dv/env/seq_lib/chip_sw_lc_ctrl_scrap_vseq.sv"  range:{start:{line:34  column:9}}}  severity:WARNING  source:{name:"verible-verilog-lint"  url:"https://github.com/chipsalliance/verible"}

Check warning on line 14 in hw/top_darjeeling/dv/env/seq_lib/chip_sw_uart_rand_baudrate_vseq.sv

See this annotation in the file changed.

@github-actions github-actions / verible-verilog-lint

[verible-verilog-lint] hw/top_darjeeling/dv/env/seq_lib/chip_sw_uart_rand_baudrate_vseq.sv#L14

Explicitly define a storage type for every parameter and localparam, (NCO_WIDTH). [Style: constants] [explicit-parameter-storage-type]
Raw output
message:"Explicitly define a storage type for every parameter and localparam, (NCO_WIDTH). [Style: constants] [explicit-parameter-storage-type]"  location:{path:"./hw/top_darjeeling/dv/env/seq_lib/chip_sw_uart_rand_baudrate_vseq.sv"  range:{start:{line:14  column:14}}}  severity:WARNING  source:{name:"verible-verilog-lint"  url:"https://github.com/chipsalliance/verible"}

Check warning on line 34 in hw/top_darjeeling/ip/ast/rtl/vio_pgd.sv

See this annotation in the file changed.

@github-actions github-actions / verible-verilog-lint

[verible-verilog-lint] hw/top_darjeeling/ip/ast/rtl/vio_pgd.sv#L34

Use 'always_comb' instead of 'always @*'. [Style: combinational-logic] [always-comb]
Raw output
message:"Use 'always_comb' instead of 'always @*'. [Style: combinational-logic] [always-comb]"  location:{path:"./hw/top_darjeeling/ip/ast/rtl/vio_pgd.sv"  range:{start:{line:34  column:1}}}  severity:WARNING  source:{name:"verible-verilog-lint"  url:"https://github.com/chipsalliance/verible"}

Check warning on line 34 in hw/top_darjeeling/ip/ast/rtl/vcmain_pgd.sv

See this annotation in the file changed.

@github-actions github-actions / verible-verilog-lint

[verible-verilog-lint] hw/top_darjeeling/ip/ast/rtl/vcmain_pgd.sv#L34

Use 'always_comb' instead of 'always @*'. [Style: combinational-logic] [always-comb]
Raw output
message:"Use 'always_comb' instead of 'always @*'. [Style: combinational-logic] [always-comb]"  location:{path:"./hw/top_darjeeling/ip/ast/rtl/vcmain_pgd.sv"  range:{start:{line:34  column:1}}}  severity:WARNING  source:{name:"verible-verilog-lint"  url:"https://github.com/chipsalliance/verible"}

Check warning on line 129 in hw/top_darjeeling/dv/env/seq_lib/chip_sw_spi_passthrough_vseq.sv

See this annotation in the file changed.

@github-actions github-actions / verible-verilog-lint

[verible-verilog-lint] hw/top_darjeeling/dv/env/seq_lib/chip_sw_spi_passthrough_vseq.sv#L129

Line length exceeds max: 100; is: 101 [Style: line-length] [line-length]
Raw output
message:"Line length exceeds max: 100; is: 101 [Style: line-length] [line-length]"  location:{path:"./hw/top_darjeeling/dv/env/seq_lib/chip_sw_spi_passthrough_vseq.sv"  range:{start:{line:129  column:101}}}  severity:WARNING  source:{name:"verible-verilog-lint"  url:"https://github.com/chipsalliance/verible"}

Check warning on line 34 in hw/top_darjeeling/ip/ast/rtl/vcc_pgd.sv

See this annotation in the file changed.

@github-actions github-actions / verible-verilog-lint

[verible-verilog-lint] hw/top_darjeeling/ip/ast/rtl/vcc_pgd.sv#L34

Use 'always_comb' instead of 'always @*'. [Style: combinational-logic] [always-comb]
Raw output
message:"Use 'always_comb' instead of 'always @*'. [Style: combinational-logic] [always-comb]"  location:{path:"./hw/top_darjeeling/ip/ast/rtl/vcc_pgd.sv"  range:{start:{line:34  column:1}}}  severity:WARNING  source:{name:"verible-verilog-lint"  url:"https://github.com/chipsalliance/verible"}

Check warning on line 307 in hw/top_darjeeling/dv/env/seq_lib/chip_padctrl_attributes_vseq.sv

See this annotation in the file changed.

@github-actions github-actions / verible-verilog-lint

[verible-verilog-lint] hw/top_darjeeling/dv/env/seq_lib/chip_padctrl_attributes_vseq.sv#L307

Line length exceeds max: 100; is: 101 [Style: line-length] [line-length]
Raw output
message:"Line length exceeds max: 100; is: 101 [Style: line-length] [line-length]"  location:{path:"./hw/top_darjeeling/dv/env/seq_lib/chip_padctrl_attributes_vseq.sv"  range:{start:{line:307  column:101}}}  severity:WARNING  source:{name:"verible-verilog-lint"  url:"https://github.com/chipsalliance/verible"}

Check warning on line 54 in hw/ip/mbx/dv/env/mbx_scoreboard.sv

See this annotation in the file changed.

@github-actions github-actions / verible-verilog-lint

[verible-verilog-lint] hw/ip/mbx/dv/env/mbx_scoreboard.sv#L54

Line length exceeds max: 100; is: 113 [Style: line-length] [line-length]
Raw output
message:"Line length exceeds max: 100; is: 113 [Style: line-length] [line-length]"  location:{path:"./hw/ip/mbx/dv/env/mbx_scoreboard.sv"  range:{start:{line:54  column:101}}}  severity:WARNING  source:{name:"verible-verilog-lint"  url:"https://github.com/chipsalliance/verible"}

Check warning on line 69 in hw/ip/mbx/dv/env/mbx_scoreboard.sv

See this annotation in the file changed.

@github-actions github-actions / verible-verilog-lint

[verible-verilog-lint] hw/ip/mbx/dv/env/mbx_scoreboard.sv#L69

Line length exceeds max: 100; is: 101 [Style: line-length] [line-length]
Raw output
message:"Line length exceeds max: 100; is: 101 [Style: line-length] [line-length]"  location:{path:"./hw/ip/mbx/dv/env/mbx_scoreboard.sv"  range:{start:{line:69  column:101}}}  severity:WARNING  source:{name:"verible-verilog-lint"  url:"https://github.com/chipsalliance/verible"}

Check warning on line 247 in hw/ip/mbx/dv/env/mbx_scoreboard.sv

See this annotation in the file changed.

@github-actions github-actions / verible-verilog-lint

[verible-verilog-lint] hw/ip/mbx/dv/env/mbx_scoreboard.sv#L247

Explicitly define a default case for every case statement. [Style: case-statements] [case-missing-default]
Raw output
message:"Explicitly define a default case for every case statement. [Style: case-statements] [case-missing-default]"  location:{path:"./hw/ip/mbx/dv/env/mbx_scoreboard.sv"  range:{start:{line:247  column:7}}}  severity:WARNING  source:{name:"verible-verilog-lint"  url:"https://github.com/chipsalliance/verible"}

Check warning on line 323 in hw/ip/mbx/dv/env/mbx_scoreboard.sv

See this annotation in the file changed.

@github-actions github-actions / verible-verilog-lint

[verible-verilog-lint] hw/ip/mbx/dv/env/mbx_scoreboard.sv#L323

Line length exceeds max: 100; is: 102 [Style: line-length] [line-length]
Raw output
message:"Line length exceeds max: 100; is: 102 [Style: line-length] [line-length]"  location:{path:"./hw/ip/mbx/dv/env/mbx_scoreboard.sv"  range:{start:{line:323  column:101}}}  severity:WARNING  source:{name:"verible-verilog-lint"  url:"https://github.com/chipsalliance/verible"}

Check warning on line 333 in hw/ip/mbx/dv/env/mbx_scoreboard.sv

See this annotation in the file changed.

@github-actions github-actions / verible-verilog-lint

[verible-verilog-lint] hw/ip/mbx/dv/env/mbx_scoreboard.sv#L333

Explicitly define a default case for every case statement. [Style: case-statements] [case-missing-default]
Raw output
message:"Explicitly define a default case for every case statement. [Style: case-statements] [case-missing-default]"  location:{path:"./hw/ip/mbx/dv/env/mbx_scoreboard.sv"  range:{start:{line:333  column:7}}}  severity:WARNING  source:{name:"verible-verilog-lint"  url:"https://github.com/chipsalliance/verible"}

Check warning on line 348 in hw/ip/mbx/dv/env/mbx_scoreboard.sv

See this annotation in the file changed.

@github-actions github-actions / verible-verilog-lint

[verible-verilog-lint] hw/ip/mbx/dv/env/mbx_scoreboard.sv#L348

Line length exceeds max: 100; is: 103 [Style: line-length] [line-length]
Raw output
message:"Line length exceeds max: 100; is: 103 [Style: line-length] [line-length]"  location:{path:"./hw/ip/mbx/dv/env/mbx_scoreboard.sv"  range:{start:{line:348  column:101}}}  severity:WARNING  source:{name:"verible-verilog-lint"  url:"https://github.com/chipsalliance/verible"}

Check warning on line 859 in hw/ip/lc_ctrl_v1/dv/env/seq_lib/lc_ctrl_v1_errors_vseq.sv

See this annotation in the file changed.

@github-actions github-actions / verible-verilog-lint

[verible-verilog-lint] hw/ip/lc_ctrl_v1/dv/env/seq_lib/lc_ctrl_v1_errors_vseq.sv#L859

Line length exceeds max: 100; is: 102 [Style: line-length] [line-length]
Raw output
message:"Line length exceeds max: 100; is: 102 [Style: line-length] [line-length]"  location:{path:"./hw/ip/lc_ctrl_v1/dv/env/seq_lib/lc_ctrl_v1_errors_vseq.sv"  range:{start:{line:859  column:101}}}  severity:WARNING  source:{name:"verible-verilog-lint"  url:"https://github.com/chipsalliance/verible"}

Check warning on line 160 in hw/top_darjeeling/dv/env/seq_lib/chip_sw_power_virus_vseq.sv

See this annotation in the file changed.

@github-actions github-actions / verible-verilog-lint

[verible-verilog-lint] hw/top_darjeeling/dv/env/seq_lib/chip_sw_power_virus_vseq.sv#L160

Line length exceeds max: 100; is: 101 [Style: line-length] [line-length]
Raw output
message:"Line length exceeds max: 100; is: 101 [Style: line-length] [line-length]"  location:{path:"./hw/top_darjeeling/dv/env/seq_lib/chip_sw_power_virus_vseq.sv"  range:{start:{line:160  column:101}}}  severity:WARNING  source:{name:"verible-verilog-lint"  url:"https://github.com/chipsalliance/verible"}