[top] Regenerate top after removing DMA interrupt

Signed-off-by: Robert Schilling <[email protected]>
lowRISC · Jul 24, 2024 · 8b51715 · 8b51715
1 parent 6e63cd1
commit 8b51715
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Showing 11 changed files with 371 additions and 506 deletions.
diff --git a/hw/top_darjeeling/data/autogen/top_darjeeling.gen.hjson b/hw/top_darjeeling/data/autogen/top_darjeeling.gen.hjson
@@ -15871,12 +15871,6 @@
       type: interrupt
       module_name: dma
     }
-    {
-      name: dma_dma_memory_buffer_limit
-      width: 1
-      type: interrupt
-      module_name: dma
-    }
     {
       name: mbx0_mbx_ready
       width: 1

diff --git a/hw/top_darjeeling/ip_autogen/rv_plic/data/rv_plic.hjson b/hw/top_darjeeling/ip_autogen/rv_plic/data/rv_plic.hjson
@@ -37,7 +37,7 @@
     { name: "NumSrc",
       desc: "Number of interrupt sources",
       type: "int",
-      default: "163",
+      default: "162",
       local: "true"
     },
     { name: "NumTarget",
@@ -1394,14 +1394,6 @@
         { bits: "1:0" }
       ],
     }
-    { name: "PRIO162",
-      desc: "Interrupt Source 162 Priority",
-      swaccess: "rw",
-      hwaccess: "hro",
-      fields: [
-        { bits: "1:0" }
-      ],
-    }
     { skipto: "0x00001000" }
     { multireg: {
         name: "IP",

diff --git a/hw/top_darjeeling/ip_autogen/rv_plic/data/top_darjeeling_rv_plic.ipconfig.hjson b/hw/top_darjeeling/ip_autogen/rv_plic/data/top_darjeeling_rv_plic.ipconfig.hjson
@@ -5,7 +5,7 @@
   instance_name: top_darjeeling_rv_plic
   param_values:
   {
-    src: 163
+    src: 162
     target: 1
     prio: 3
     top_name: darjeeling

diff --git a/hw/top_darjeeling/ip_autogen/rv_plic/rtl/rv_plic.sv b/hw/top_darjeeling/ip_autogen/rv_plic/rtl/rv_plic.sv
@@ -260,12 +260,11 @@ module rv_plic import rv_plic_reg_pkg::*; #(
   assign prio[159] = reg2hw.prio159.q;
   assign prio[160] = reg2hw.prio160.q;
   assign prio[161] = reg2hw.prio161.q;
-  assign prio[162] = reg2hw.prio162.q;
 
   //////////////////////
   // Interrupt Enable //
   //////////////////////
-  for (genvar s = 0; s < 163; s++) begin : gen_ie0
+  for (genvar s = 0; s < 162; s++) begin : gen_ie0
     assign ie[0][s] = reg2hw.ie0[s].q;
   end
 
@@ -291,7 +290,7 @@ module rv_plic import rv_plic_reg_pkg::*; #(
   ////////
   // IP //
   ////////
-  for (genvar s = 0; s < 163; s++) begin : gen_ip
+  for (genvar s = 0; s < 162; s++) begin : gen_ip
     assign hw2reg.ip[s].de = 1'b1; // Always write
     assign hw2reg.ip[s].d  = ip[s];
   end

diff --git a/hw/top_darjeeling/ip_autogen/rv_plic/rtl/rv_plic_reg_pkg.sv b/hw/top_darjeeling/ip_autogen/rv_plic/rtl/rv_plic_reg_pkg.sv