[spi_device] Add support for 1r1w RAMs and parity init #30079
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verible-lint
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[verible-verilog-lint] hw/ip/spi_device/rtl/spid_dpram.sv#L123:
hw/ip/spi_device/rtl/spid_dpram.sv#L123
All generate block labels must start with g_ or gen_ [Style: generate-constructs] [generate-label-prefix]
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[verible-verilog-lint] hw/ip/spi_device/rtl/spid_dpram.sv#L177:
hw/ip/spi_device/rtl/spid_dpram.sv#L177
All generate block labels must start with g_ or gen_ [Style: generate-constructs] [generate-label-prefix]
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