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Update lowrisc_ibex to lowRISC/ibex@667fd20d #2943

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Update lowrisc_ibex to lowRISC/ibex@667fd20d

Update lowrisc_ibex to lowRISC/ibex@667fd20d #2943

Re-run triggered December 8, 2024 13:35
@nasahlpanasahlpa
7ed46b1
master
Status Success
Total duration 7m 40s
Artifacts 33

ci.yml

on: push
Lint (quick)
2m 37s
Lint (quick)
Earl Grey for CW310 Hyperdebug  /  Build bitstream
1h 13m
Earl Grey for CW310 Hyperdebug / Build bitstream
Earl Grey for CW340  /  Build bitstream
1h 21m
Earl Grey for CW340 / Build bitstream
Earl Grey for CW310  /  Build bitstream
1h 9m
Earl Grey for CW310 / Build bitstream
Lint (slow)
13m 38s
Lint (slow)
Airgapped build
8m 44s
Airgapped build
Verible lint
0s
Verible lint
Run OTBN smoke Test
2m 26s
Run OTBN smoke Test
Run OTBN crypto tests
2m 50s
Run OTBN crypto tests
Verilated English Breakfast
8m 35s
Verilated English Breakfast
Verilated Earl Grey
1h 22m
Verilated Earl Grey
CW305's Bitstream
22m 46s
CW305's Bitstream
Build Docker Containers
2m 48s
Build Docker Containers
Build and test software
15m 43s
Build and test software
CW310 SiVal Tests  /  FPGA test
26m 3s
CW310 SiVal Tests / FPGA test
CW310 SiVal ROM_EXT Tests  /  FPGA test
35m 13s
CW310 SiVal ROM_EXT Tests / FPGA test
CW310 Manufacturing Tests  /  FPGA test
29m 24s
CW310 Manufacturing Tests / FPGA test
CW340 Test ROM Tests  /  FPGA test
6m 38s
CW340 Test ROM Tests / FPGA test
CW340 ROM Tests  /  FPGA test
49s
CW340 ROM Tests / FPGA test
CW340 ROM_EXT Tests  /  FPGA test
3m 17s
CW340 ROM_EXT Tests / FPGA test
CW340 SiVal Tests  /  FPGA test
16m 11s
CW340 SiVal Tests / FPGA test
CW340 SiVal ROM_EXT Tests  /  FPGA test
3m 18s
CW340 SiVal ROM_EXT Tests / FPGA test
CW340 Manufacturing Tests  /  FPGA test
6m 14s
CW340 Manufacturing Tests / FPGA test
CW310 Test ROM Tests  /  FPGA test
3m 59s
CW310 Test ROM Tests / FPGA test
CW310 ROM Tests  /  FPGA test
37m 52s
CW310 ROM Tests / FPGA test
CW310 ROM_EXT Tests  /  FPGA test
7m 38s
CW310 ROM_EXT Tests / FPGA test
Cache bitstreams to GCP
3m 9s
Cache bitstreams to GCP
Verify FPGA jobs
34s
Verify FPGA jobs
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Annotations

2 errors
Lint (slow)
Process completed with exit code 1.
Build and test software
Process completed with exit code 1.

Artifacts

Produced during runtime
Name Size
execute_sival_rom_ext_fpga_tests_cw340-targets
275 Bytes
execute_sival_rom_ext_fpga_tests_cw340-test-results
11.7 KB
execute_test_rom_fpga_tests_cw340-targets
356 Bytes
execute_test_rom_fpga_tests_cw340-test-results
48.2 KB