Fixup the questa build/sim command templates in rtl_simulation.yaml

We do not actively use or test these commands and tools, so they probably broke some time ago. Signed-off-by: Harry Callahan <[email protected]>
lowRISC · Oct 18, 2023 · 3f77112 · 3f77112
1 parent 97c0a72
commit 3f77112
Showing 1 changed file with 2 additions and 2 deletions.
diff --git a/dv/uvm/core_ibex/yaml/rtl_simulation.yaml b/dv/uvm/core_ibex/yaml/rtl_simulation.yaml
@@ -101,7 +101,7 @@
           +define+UVM
           -timescale \"1 ns / 1 ps \"
           -writetoplevels <tb_dir>/top.list
-          -l <tb_dir>/<rtl_log>
+          -l <tb_build_log>
           <cmp_opts>
   sim:
     cmd:
@@ -118,7 +118,7 @@
           +UVM_VERBOSITY=UVM_LOW
           +bin=<binary>
           +ibex_tracer_file_base=<rtl_trace>
-          -l <test_dir>/sim.log
+          -l <rtl_sim_log>
           <cov_opts>
     cov_opts: >-
       -do "coverage save -onexit <tb_dir>/cov.ucdb;"