Fix overwriting typedef name when processing packed enum #6053
Triggered via pull request
November 22, 2024 07:56
kamilrakoczy
Status
Success
Total duration
1h 14m 34s
Artifacts
49
main.yml
on: pull_request
Matrix: build-binaries
Build tools
11m 2s
Emit Workflow Info
0s
Style check
1m 25s
Verify README Correctness (Installation From Sources)
43m 7s
Matrix: Large Designs Tests / opentitan_parse_report
Matrix: Parsing Tests / parsing-tests
Large Designs Tests
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Ibex (Vivado synthesis)
8m 39s
Large Designs Tests
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Ibex (F4PGA synthesis)
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Large Designs Tests
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Opentitan 9d82960888 (synthesis)
33m 8s
Large Designs Tests
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Opentitan (synthesis)
1h 3m
Large Designs Tests
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VeeR-EH1 (synthesis)
5m 6s
Large Designs Tests
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Black Parrot (AMD (Xilinx) FPGA synthesis)
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Large Designs Tests
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Black Parrot (ASIC synthesis)
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Large Designs Tests
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Black Parrot (AMD (Xilinx) with PySynlig)
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Diff generated BSG Micro Designs tests
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Parse and diff BSG Micro Designs
7m 23s
Matrix: Formal Verification Tests / tests-formal-verification
Parsing Tests
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Generate AST diff
2m 24s
Parsing Tests
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Summary Generation
1m 27s
Verify README Correctness (Download And Run Release)
0s
Annotations
4 warnings
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Large Designs Tests / VeeR-EH1 (synthesis)
No files were found with the provided path: tests/build/chipsalliance.org_cores_VeeR_EH1_1.9/synth-vivado/chipsalliance.org_cores_VeeR_EH1_1.9.edif. No artifacts will be uploaded.
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Diff generated BSG Micro Designs tests / Parse and diff BSG Micro Designs
Some generated tests differ from the reference or were not generated at all. Check the test statuses in the workflow summary or `bsg_micro_designs_summary.md` in the artifacts.
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Large Designs Tests / Black Parrot (ASIC synthesis)
No files were found with the provided path: build
third_party/OpenROAD-flow-scripts/logs
third_party/OpenROAD-flow-scripts/reports
third_party/OpenROAD-flow-scripts/results. No artifacts will be uploaded.
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Large Designs Tests / Opentitan (synthesis)
No files were found with the provided path: tests/build/lowrisc_systems_custom_tiny_chip_custom_tiny_nexysvideo_0.1/synth-yosys/lowrisc_systems_custom_tiny_chip_custom_tiny_nexysvideo_0.1.edif. No artifacts will be uploaded.
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binaries-asan
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binaries-package
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binaries-plugin
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binaries-pysynlig
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binaries-release
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bp_e_bp_unicore_cfg.edif
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bsg-logs
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bsg-outputs
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formal-verification-logs-simple
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formal-verification-logs-sv2v
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formal-verification-logs-yosys
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lowrisc_ibex_top_artya7_surelog_0.1.bit
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lowrisc_systems_top_earlgrey_nexysvideo_0.1.bit
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opentitan-logs-full
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opentitan-logs-quick
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plots_binaries-asan
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plots_binaries-package
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plots_binaries-plugin
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plots_binaries-pysynlig
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70.1 KB |
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plots_binaries-release
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33.1 KB |
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plots_blackparrot_synth_asic
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244 KB |
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plots_blackparrot_synth_xilinx
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112 KB |
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plots_blackparrot_synth_xilinx_python
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plots_build_tools
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plots_formal_verification_simple
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115 KB |
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plots_formal_verification_sv2v
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111 KB |
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plots_formal_verification_yosys
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93.9 KB |
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plots_ibex_synth
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56.5 KB |
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plots_ibex_synth_f4pga
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plots_opentitan_9d82960888_synth
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192 KB |
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plots_opentitan_parse_report_full
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82 KB |
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plots_opentitan_parse_report_quick
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40.9 KB |
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plots_opentitan_synth
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309 KB |
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plots_tests_asan_read_systemverilog
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plots_tests_asan_read_uhdm
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plots_tests_plugin_read_systemverilog
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plots_tests_plugin_read_uhdm
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plots_tests_release_read_systemverilog
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plots_tests_release_read_uhdm
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plots_veer_synth
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34.8 KB |
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python_bp_e_bp_unicore_cfg.edif
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results_parsing_tests_asan_read_systemverilog
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results_parsing_tests_asan_read_uhdm
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1.81 MB |
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results_parsing_tests_plugin_read_systemverilog
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1.53 MB |
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results_parsing_tests_plugin_read_uhdm
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results_parsing_tests_release_read_systemverilog
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1.49 MB |
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results_parsing_tests_release_read_uhdm
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1.73 MB |
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tools
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39.1 MB |
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top_artya7.bit
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