Adding east_not_west to cid

bespoke-silicon-group · Feb 2, 2022 · d348fac · d348fac
1 parent 7dbbd51
commit d348fac
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Showing 2 changed files with 3 additions and 2 deletions.
diff --git a/testbenches/common/v/spmd_testbench.v b/testbenches/common/v/spmd_testbench.v
@@ -42,7 +42,7 @@ module spmd_testbench
 
   parameter wh_flit_width_p = vcache_dma_data_width_p;
   parameter wh_ruche_factor_p = 2;
-  parameter wh_cid_width_p = `BSG_SAFE_CLOG2(2*wh_ruche_factor_p); // no concentration in this testbench; cid is ignored.
+  parameter wh_cid_width_p = `BSG_SAFE_CLOG2(2*wh_ruche_factor_p+1); // no concentration in this testbench; cid is ignored.
   parameter wh_len_width_p = `BSG_SAFE_CLOG2(1+(vcache_block_size_in_words_p*vcache_data_width_p/vcache_dma_data_width_p)); // header + addr + data
   parameter wh_cord_width_p = x_cord_width_p;
 

diff --git a/v/bsg_manycore_tile_vcache.v b/v/bsg_manycore_tile_vcache.v
@@ -286,7 +286,8 @@ module bsg_manycore_tile_vcache
     // concentrator id
     // lower bits come from lower bits of global_x
     // upper bits come from whether its north or south vc.
-    ,.my_wh_cid_i({~global_y_r[y_subcord_width_lp-1], global_x_r[0+:lg_wh_ruche_factor_lp]})
+    // top bit is whether its eastbound or westbound
+    ,.my_wh_cid_i({wh_dest_east_not_west_lo, ~global_y_r[y_subcord_width_lp-1], global_x_r[0+:lg_wh_ruche_factor_lp]})
   );