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Updating manycore for cache dma (#622)
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* Updating manycore for cache dma

* Removing vcache_wh_header struct

* Moving localparams

* Fixing burst len bug
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dpetrisko authored Feb 4, 2022
1 parent 976b458 commit 7dbbd51
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Showing 9 changed files with 99 additions and 800 deletions.
2 changes: 1 addition & 1 deletion machines/arch_filelist.mk
Original file line number Diff line number Diff line change
Expand Up @@ -129,6 +129,7 @@ VSOURCES += $(BASEJUMP_STL_DIR)/bsg_async/bsg_async_ptr_gray.v
VSOURCES += $(BASEJUMP_STL_DIR)/bsg_cache/bsg_cache.v
VSOURCES += $(BASEJUMP_STL_DIR)/bsg_cache/bsg_cache_decode.v
VSOURCES += $(BASEJUMP_STL_DIR)/bsg_cache/bsg_cache_dma.v
VSOURCES += $(BASEJUMP_STL_DIR)/bsg_cache/bsg_cache_dma_to_wormhole.v
VSOURCES += $(BASEJUMP_STL_DIR)/bsg_cache/bsg_cache_miss.v
VSOURCES += $(BASEJUMP_STL_DIR)/bsg_cache/bsg_cache_sbuf.v
VSOURCES += $(BASEJUMP_STL_DIR)/bsg_cache/bsg_cache_sbuf_queue.v
Expand Down Expand Up @@ -181,7 +182,6 @@ VSOURCES += $(BSG_MANYCORE_DIR)/v/bsg_manycore_tile_compute_array_ruche.v
VSOURCES += $(BSG_MANYCORE_DIR)/v/bsg_manycore_tile_compute_ruche.v
VSOURCES += $(BSG_MANYCORE_DIR)/v/bsg_manycore_tile_vcache_array.v
VSOURCES += $(BSG_MANYCORE_DIR)/v/bsg_manycore_tile_vcache.v
VSOURCES += $(BSG_MANYCORE_DIR)/v/bsg_cache_dma_to_wormhole.v
VSOURCES += $(BSG_MANYCORE_DIR)/v/bsg_manycore_hetero_socket.v
VSOURCES += $(BSG_MANYCORE_DIR)/v/bsg_manycore_mesh_node.v
VSOURCES += $(BSG_MANYCORE_DIR)/v/bsg_manycore_endpoint.v
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4 changes: 2 additions & 2 deletions machines/sim_filelist.mk
Original file line number Diff line number Diff line change
Expand Up @@ -32,7 +32,7 @@ VSOURCES += $(BASEJUMP_STL_DIR)/bsg_test/bsg_nonsynth_dramsim3.v
VSOURCES += $(BASEJUMP_STL_DIR)/bsg_test/bsg_nonsynth_dramsim3_map.v
VSOURCES += $(BASEJUMP_STL_DIR)/bsg_test/bsg_nonsynth_dramsim3_unmap.v
VSOURCES += $(BASEJUMP_STL_DIR)/bsg_test/bsg_dramsim3.cpp
CSOURCES += $(BASEJUMP_STL_DIR)/imports/DRAMSim3/src/bankstate.cc
CSOURCES += $(BASEJUMP_STL_DIR)/imports/DRAMSim3/src/bankstate.cc
CSOURCES += $(BASEJUMP_STL_DIR)/imports/DRAMSim3/src/channel_state.cc
CSOURCES += $(BASEJUMP_STL_DIR)/imports/DRAMSim3/src/command_queue.cc
CSOURCES += $(BASEJUMP_STL_DIR)/imports/DRAMSim3/src/common.cc
Expand All @@ -50,6 +50,7 @@ VSOURCES += $(BASEJUMP_STL_DIR)/bsg_cache/bsg_cache_to_test_dram.v
VSOURCES += $(BASEJUMP_STL_DIR)/bsg_cache/bsg_cache_to_test_dram_tx.v
VSOURCES += $(BASEJUMP_STL_DIR)/bsg_cache/bsg_cache_to_test_dram_rx.v
VSOURCES += $(BASEJUMP_STL_DIR)/bsg_cache/bsg_cache_to_test_dram_rx_reorder.v
VSOURCES += $(BASEJUMP_STL_DIR)/bsg_cache/bsg_wormhole_to_cache_dma_fanout.v

VSOURCES += $(BSG_MANYCORE_DIR)/testbenches/common/v/router_profiler.v
VSOURCES += $(BSG_MANYCORE_DIR)/testbenches/common/v/vanilla_core_trace.v
Expand All @@ -64,7 +65,6 @@ VSOURCES += $(BSG_MANYCORE_DIR)/testbenches/common/v/bsg_nonsynth_manycore_io_co
VSOURCES += $(BSG_MANYCORE_DIR)/testbenches/common/v/bsg_nonsynth_manycore_spmd_loader.v
VSOURCES += $(BSG_MANYCORE_DIR)/testbenches/common/v/bsg_nonsynth_manycore_monitor.v
VSOURCES += $(BSG_MANYCORE_DIR)/testbenches/common/v/bsg_nonsynth_wormhole_test_mem.v
VSOURCES += $(BSG_MANYCORE_DIR)/testbenches/common/v/bsg_manycore_vcache_wh_to_cache_dma.v
VSOURCES += $(BSG_MANYCORE_DIR)/testbenches/common/v/bsg_nonsynth_manycore_testbench.v
VSOURCES += $(BSG_MANYCORE_DIR)/testbenches/common/v/vcache_dma_to_dram_channel_map.v
VSOURCES += $(BSG_MANYCORE_DIR)/testbenches/common/v/spmd_testbench.v
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