fix(trace): fix iretire in rename

OpenXiangShan · Nov 25, 2024 · 13140f4 · 13140f4
1 parent ca3b3fc
commit 13140f4
Showing 1 changed file with 5 additions and 5 deletions.
diff --git a/src/main/scala/xiangshan/backend/rename/Rename.scala b/src/main/scala/xiangshan/backend/rename/Rename.scala
@@ -439,9 +439,9 @@ class Rename(implicit p: Parameters) extends XSModule with HasCircularQueuePtrHe
   val iLastSizeVec = isRVCVec.map(isRVC => Mux(isRVC, Ilastsize.HalfWord, Ilastsize.Word))
   val halfWordNumVec = isRVCVec.map(isRVC => Mux(isRVC, 1.U, 2.U))
   val halfWordNumMatrix = (0 until RenameWidth).map(
-    i => compressMasksVec(i).asBools.map(
-      mask => Mux(mask, halfWordNumVec(i), 0.U)
-    )
+    i => compressMasksVec(i).asBools.zipWithIndex.map{ case(mask, j) =>
+      Mux(mask, halfWordNumVec(j), 0.U)
+    }
   )
 
   for (i <- 0 until RenameWidth) {
@@ -452,9 +452,9 @@ class Rename(implicit p: Parameters) extends XSModule with HasCircularQueuePtrHe
     )
 
     // ilastsize
-    val j = i
+    val tmp = i
     val lastIsRVC = WireInit(false.B)
-    (j until RenameWidth).map { j =>
+    (tmp until RenameWidth).map { j =>
       when(compressMasksVec(i)(j)) {
         lastIsRVC := io.in(j).bits.preDecodeInfo.isRVC
       }