feat(Zicclsm): minor refactoring misalign and support for vector misalign #9517
Triggered via pull request
December 9, 2024 13:07
Status
Success
Total duration
6h 23m 0s
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emu.yml
on: pull_request
Changes Detection
6s
Generate Verilog
1h 55m
EMU - Basics
6h 22m
EMU - CHI
2h 14m
EMU - Performance
3h 32m
EMU - MC
4h 28m
SIMV - Basics
2h 55m
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Annotations
3 warnings
Changes Detection
ubuntu-latest pipelines will use ubuntu-24.04 soon. For more details, see https://github.com/actions/runner-images/issues/10636
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Changes Detection
Unexpected input(s) 'predicate-quantifier', valid inputs are ['token', 'working-directory', 'ref', 'base', 'filters', 'list-files', 'initial-fetch-depth']
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Check Submodules
ubuntu-latest pipelines will use ubuntu-24.04 soon. For more details, see https://github.com/actions/runner-images/issues/10636
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