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morello atomic: Trim gcvalue from the spin loop of arithmetic atomics #2249

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morello atomic: Trim gcvalue from the spin loop of arithmetic atomics #2249

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8 changes: 3 additions & 5 deletions sys/arm64/include/atomic.h
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Original file line number Diff line number Diff line change
Expand Up @@ -667,24 +667,22 @@
atomic_##op##_##bar##ptr(volatile uintptr_t *p, uintptr_t val) \
{ \
uintptr_t previous; \
ptraddr_t tmp1, tmp2; \
ptraddr_t tmp; \
int res; \
\
__asm __volatile( \
"1:" \
"ld" #a "xr %0, [%4]\n" \
"gcvalue %2, %0\n" \
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This could be eliminated if there was an equivalent to %wN to denote the X version of the C register as then we could use that as the second operand in the scvalue instruction below.

"gcvalue %3, %5\n" \
"" #asm_op " %2, %2, %3\n" \
"scvalue %0, %0, %2\n" \
"st" #l "xr %w1, %0, [%4]\n" \
"cbnz %w1, 1b" \
: "=&C" (previous), "=&r" (res), "=&r" (tmp1), \
"=&r" (tmp2) \
: "C" (p), "C" (val) \
: "=&C" (previous), "=&r" (res), "=&r" (tmp) \
: "r" ((ptraddr_t)val), "C" (p) \
: "memory", "cc"); \
}

Check warning on line 685 in sys/arm64/include/atomic.h

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Missing Signed-off-by: line
#define _ATOMIC_OP_PTR(op, asm_op) \
_ATOMIC_OP_PTR_IMPL(op, asm_op, , , ) \
_ATOMIC_OP_PTR_IMPL(op, asm_op, acq_, a, ) \
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