Merge pull request #410 from SrikarJosyula/master

Bootwrapper Support

CMakeLists.txt

@@ -0,0 +1,106 @@
+## @file
+ # Copyright (c) 2023, Arm Limited or its affiliates. All rights reserved.
+ # SPDX-License-Identifier : Apache-2.0
+ #
+ # Licensed under the Apache License, Version 2.0 (the "License");
+ # you may not use this file except in compliance with the License.
+ # You may obtain a copy of the License at
+ #
+ #  http://www.apache.org/licenses/LICENSE-2.0
+ #
+ # Unless required by applicable law or agreed to in writing, software
+ # distributed under the License is distributed on an "AS IS" BASIS,
+ # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ # See the License for the specific language governing permissions and
+ # limitations under the License.
+ ##
+
+# Set the minimum required version of CMake for the project
+cmake_minimum_required(VERSION 3.17)
+
+project(sbsa-acs LANGUAGES)
+
+# cmake_policy
+cmake_policy(SET CMP0001 NEW)
+
+### Tool dependency check - end ###
+
+get_filename_component(ROOT_DIR . ABSOLUTE)
+
+# Set internal build directory variable
+set(BUILD ${CMAKE_CURRENT_BINARY_DIR} CACHE INTERNAL "Setting build directory to ${BUILD}" FORCE)
+file(MAKE_DIRECTORY ${BUILD}/output/)
+
+# Set global compile list variable
+set(COMPILE_LIST "")
+
+#### Include cmake support module ###
+include(${ROOT_DIR}/tools/cmake/toolchain/utils.cmake)
+include(${ROOT_DIR}/tools/cmake/toolchain/default.cmake)
+####
+
+
+### Valid value range for command line argument ###
+
+list(APPEND ARM_ARCH_MAJOR_LIST 8 9)
+
+###
+
+# Check for valid targets
+_get_sub_dir_list(TARGET_LIST ${ROOT_DIR}/platform/pal_baremetal/)
+if(NOT DEFINED TARGET)
+    set(TARGET ${TARGET_DFLT} CACHE INTERNAL "Defaulting target to ${TARGET}" FORCE)
+else()
+    set(TARGET ${TARGET} CACHE INTERNAL "TARGET is set to ${TARGET}" FORCE)
+endif()
+
+if(NOT ${TARGET} IN_LIST TARGET_LIST)
+    message(FATAL_ERROR "[ACS] : Error: Unspported value for -DTARGET=, supported targets are : ${TARGET_LIST}")
+else()
+    message(STATUS "[ACS] : TARGET is set to ${TARGET}")
+endif()
+
+# Check for ARM_ARCH_MAJOR
+if(NOT DEFINED ARM_ARCH_MAJOR)
+    set(ARM_ARCH_MAJOR "${ARM_ARCH_MAJOR_DFLT}" CACHE INTERNAL "Default ARM_ARCH_MAJOR value" FORCE)
+        message(STATUS "[ACS] : Defaulting ARM_ARCH_MAJOR to ${ARM_ARCH_MAJOR}")
+else()
+    if(NOT ${ARM_ARCH_MAJOR} IN_LIST ARM_ARCH_MAJOR_LIST)
+        message(FATAL_ERROR "[ACS] : Error: Unspported value for -DARM_ARCH_MAJOR=, supported values are : ${ARM_ARCH_MAJOR_LIST}")
+    endif()
+    message(STATUS "[ACS] : ARM_ARCH_MAJOR is set to ${ARM_ARCH_MAJOR}")
+endif()
+
+# Check for ARM_ARCH_MINOR
+if(NOT DEFINED ARM_ARCH_MINOR)
+    set(ARM_ARCH_MINOR "${ARM_ARCH_MINOR_DFLT}" CACHE INTERNAL "Default ARM_ARCH_MINOR value" FORCE)
+        message(STATUS "[ACS] : Defaulting ARM_ARCH_MINOR to ${ARM_ARCH_MINOR}")
+else()
+    message(STATUS "[ACS] : ARM_ARCH_MINOR is set to ${ARM_ARCH_MINOR}")
+endif()
+
+# Setup toolchain parameters for compilation and link
+include(${ROOT_DIR}/tools/cmake/toolchain/common.cmake)
+
+
+### Cmake clean target ###
+list(APPEND CLEAN_LIST
+        ${CMAKE_CURRENT_BINARY_DIR}/${OUTPUT_HEADER}
+        ${CMAKE_CURRENT_BINARY_DIR}/output
+)
+
+# Include the files for make clean
+foreach(clean_item ${CLEAN_LIST})
+        set_property(DIRECTORY APPEND PROPERTY ADDITIONAL_MAKE_CLEAN_FILES ${clean_item})
+endforeach()
+###
+
+add_subdirectory(${ROOT_DIR}/tools/cmake/acs_host)
+
+### Throw waring for the files which is not compiled ###
+
+list(REMOVE_DUPLICATES COMPILE_LIST)
+execute_process(COMMAND python ${ROOT_DIR}/tools/scripts/compile_check.py "${COMPILE_LIST}" "${ROOT_DIR}" "${TARGET}" OUTPUT_VARIABLE NOT_COMPILED_FILES)
+if(NOT ${NOT_COMPILED_FILES} MATCHES NULL)
+    message(WARNING "Following files are not compiled ${NOT_COMPILED_FILES}")
+endif()

baremetal_app/SbsaAvs.h

@@ -18,18 +18,65 @@
 #ifndef __SBSA_AVS_LEVEL_H__
 #define __SBSA_AVS_LEVEL_H__
 
-  #define SIZE_4K 0x100
+#include "platform_image_def.h"
+#include "platform_override_fvp.h"
 
-  #define SBSA_ACS_MAJOR_VER     7
-  #define SBSA_ACS_MINOR_VER     1
-  #define SBSA_ACS_SUBMINOR_VER  3
+#define SBSA_ACS_MAJOR_VER     7
+#define SBSA_ACS_MINOR_VER     1
+#define SBSA_ACS_SUBMINOR_VER  3
 
-  #define SBSA_MIN_LEVEL_SUPPORTED 3
-  #define SBSA_MAX_LEVEL_SUPPORTED 7
+#define SIZE_4K 0x1000
 
-  #ifdef _AARCH64_BUILD_
+#define SBSA_MIN_LEVEL_SUPPORTED 3
+#define SBSA_MAX_LEVEL_SUPPORTED 7
+
+#define INVALID_MPIDR     0xffffffff
+
+#define STACK_SIZE          0x1000
+
+#define VAL_TG0_4K  0x0
+#define VAL_TG0_64K 0x1
+#define VAL_TG0_16K 0x2
+#define PAGE_SIZE_4K        0x1000
+#define PAGE_SIZE_16K       (4 * 0x1000)
+#define PAGE_SIZE_64K       (16 * 0x1000)
+#define PAGE_BITS_4K        12
+#define PAGE_BITS_16K       14
+#define PAGE_BITS_64K       16
+
+#define PLATFORM_CPU_COUNT PLATFORM_OVERRIDE_PE_CNT
+
+#if (PLATFORM_PAGE_SIZE == PAGE_SIZE_4K)
+ #define PAGE_ALIGNMENT      PAGE_SIZE_4K
+ #define PAGE_SIZE           PAGE_SIZE_4K
+ #define TCR_TG0             VAL_TG0_4K
+#elif (PLATFORM_PAGE_SIZE == PAGE_SIZE_16K)
+ #define PAGE_ALIGNMENT      PAGE_SIZE_16K
+ #define PAGE_SIZE           PAGE_SIZE_16K
+ #define TCR_TG0             VAL_TG0_16K
+#elif (PLATFORM_PAGE_SIZE == PAGE_SIZE_64K)
+ #define PAGE_ALIGNMENT      PAGE_SIZE_64K
+ #define PAGE_SIZE           PAGE_SIZE_64K
+ #define TCR_TG0             VAL_TG0_64K
+#else
+ #error "Undefined value for PLATFORM_PAGE_SIZE"
+#endif
+
+/*******************************************************************************
+ * Used to align variables on the biggest cache line size in the platform.
+ * This is known only to the platform as it might have a combination of
+ * integrated and external caches.
+ ******************************************************************************/
+#define CACHE_WRITEBACK_SHIFT     6
+#define CACHE_WRITEBACK_GRANULE   (1 << CACHE_WRITEBACK_SHIFT)
+
+#ifdef _AARCH64_BUILD_
   unsigned long __stack_chk_guard = 0xBAAAAAAD;
   unsigned long __stack_chk_fail =  0xBAAFAAAD;
-  #endif
-
 #endif
+
+#define SCTLR_I_BIT         (1 << 12)
+#define SCTLR_M_BIT         (1 << 0)
+#define DISABLE_MMU_BIT     (0xFFFFFFFFFFFFFFFE)
+
+#endif /* __SBSA_AVS_LEVEL_H__ */