v18.02_REL1.3: Added pre-built image and updated changelog

Signed-off-by: Sakar Arora <[email protected]>
ARM-software · Feb 2, 2018 · 5d5ba88 · 5d5ba88
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diff --git a/changelog.txt b/changelog.txt
@@ -1,3 +1,9 @@
+v18.02_REL1.3
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+* Test #84: Fix issue where Uart interrupt test returns garbage value when interrupt is not generated.
+* Test #62: Made a logical change to the PCI test loop and the error conditions.
+* Test #59: Fixed the issue where bdf=0 was treated as an invalid configuration.
+
 v17.10_REL1.2
 
 * Test #61: Bug fixed in reading PCIE RC Cache Coherency attributes from IORT.

diff --git a/prebuilt_images/v18.02_REL1.3/Sbsa.efi b/prebuilt_images/v18.02_REL1.3/Sbsa.efi