dts: xtensa: nxp_imx8: move up the definition of system-controller

This has no address space and doesn't belong between peripheral
nodes. Move it up the DTSI for better visibility. No functional
change.

Signed-off-by: Laurentiu Mihalcea <[email protected]>

dts/xtensa/nxp/nxp_imx8.dtsi

@@ -32,6 +32,32 @@
 		};
 	};
 
+	scu: system-controller {
+		ccm: clock-controller {
+			compatible = "nxp,imx-ccm";
+			#clock-cells = <3>;
+		};
+
+		iomuxc: iomuxc {
+			compatible = "nxp,imx-iomuxc-scu";
+			pinctrl: pinctrl {
+				compatible = "nxp,imx8-pinctrl";
+			};
+		};
+
+		power-domains {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			irqstr_pd: pd@0 {
+				compatible = "nxp,imx8qm-scu-pd", "nxp,scu-pd";
+				reg = <0>;
+				nxp,resource-id = <IMX_SC_R_IRQSTR_DSP>;
+				#power-domain-cells = <0>;
+			};
+		};
+	};
+
 	sram0: memory@92400000 {
 		device_type = "memory";
 		compatible = "mmio-sram";
@@ -86,32 +112,6 @@
 		reg = <0x5d1d0000 DT_SIZE_K(64)>;
 	};
 
-	scu: system-controller {
-		ccm: clock-controller {
-			compatible = "nxp,imx-ccm";
-			#clock-cells = <3>;
-		};
-
-		iomuxc: iomuxc {
-			compatible = "nxp,imx-iomuxc-scu";
-			pinctrl: pinctrl {
-				compatible = "nxp,imx8-pinctrl";
-			};
-		};
-
-		power-domains {
-			#address-cells = <1>;
-			#size-cells = <0>;
-
-			irqstr_pd: pd@0 {
-				compatible = "nxp,imx8qm-scu-pd", "nxp,scu-pd";
-				reg = <0>;
-				nxp,resource-id = <IMX_SC_R_IRQSTR_DSP>;
-				#power-domain-cells = <0>;
-			};
-		};
-	};
-
 	lpuart2: serial@5a080000 {
 		compatible = "nxp,imx-lpuart", "nxp,lpuart";
 		reg = <0x5a080000 DT_SIZE_K(4)>;