ci: use uppercase I64, I32 etc as constraints in operation definitions (

#2909)

For some reason it prefers this to Annotated inline, not sure why.

Pylance errors: 238 -> 215

tests/irdl/test_declarative_assembly_format.py

@@ -8,7 +8,7 @@
 import pytest
 
 from xdsl.context import MLContext
-from xdsl.dialects.builtin import IntegerAttr, IntegerType, ModuleOp, i32
+from xdsl.dialects.builtin import I32, IntegerAttr, ModuleOp
 from xdsl.dialects.test import Test, TestType
 from xdsl.ir import (
     Attribute,
@@ -501,9 +501,7 @@ def test_typed_attribute_variable(program: str, generic_program: str):
     @irdl_op_definition
     class TypedAttributeOp(IRDLOperation):
         name = "test.typed_attr"
-        attr: IntegerAttr[IntegerType] = attr_def(
-            IntegerAttr[Annotated[IntegerType, i32]]
-        )
+        attr = attr_def(IntegerAttr[I32])
 
         assembly_format = "$attr attr-dict"
 

xdsl/dialects/builtin.py

@@ -409,9 +409,11 @@ def bitwidth(self) -> int:
 
 i64 = IntegerType(64)
 i32 = IntegerType(32)
+i16 = IntegerType(16)
 i1 = IntegerType(1)
 I64 = Annotated[IntegerType, i64]
 I32 = Annotated[IntegerType, i32]
+I16 = Annotated[IntegerType, i16]
 I1 = Annotated[IntegerType, i1]
 
 

xdsl/dialects/comb.py

@@ -13,7 +13,7 @@
 from collections.abc import Sequence
 from typing import Annotated
 
-from xdsl.dialects.builtin import IntegerAttr, IntegerType, UnitAttr, i32, i64
+from xdsl.dialects.builtin import I32, I64, IntegerAttr, IntegerType, UnitAttr, i32
 from xdsl.ir import Attribute, Dialect, Operation, OpResult, SSAValue, TypeAttribute
 from xdsl.irdl import (
     ConstraintVar,
@@ -257,9 +257,7 @@ class ICmpOp(IRDLOperation, ABC):
 
     T = Annotated[IntegerType, ConstraintVar("T")]
 
-    predicate: IntegerAttr[IntegerType] = attr_def(
-        IntegerAttr[Annotated[IntegerType, i64]]
-    )
+    predicate: IntegerAttr[IntegerType] = attr_def(IntegerAttr[I64])
     lhs: Operand = operand_def(T)
     rhs: Operand = operand_def(T)
     result: OpResult = result_def(IntegerType(1))
@@ -397,7 +395,7 @@ class ExtractOp(IRDLOperation):
 
     input: Operand = operand_def(IntegerType)
     low_bit: IntegerAttr[Annotated[IntegerType, i32]] = attr_def(
-        IntegerAttr[Annotated[IntegerType, i32]], attr_name="lowBit"
+        IntegerAttr[I32], attr_name="lowBit"
     )
     result: OpResult = result_def(IntegerType)
 

xdsl/dialects/experimental/aie.py

@@ -9,10 +9,11 @@
 
 from collections.abc import Iterable
 from enum import auto
-from typing import Annotated, Generic
+from typing import Generic
 
 from xdsl.dialects import memref
 from xdsl.dialects.builtin import (
+    I32,
     AnyAttr,
     AnyIntegerAttr,
     ArrayAttr,
@@ -887,7 +888,7 @@ def __init__(
         if isinstance(object_fifo, str):
             object_fifo = SymbolRefAttr(object_fifo)
 
-        result_subview = ObjectFIFOSubview.from_element_type_and_shape(
+        result_subview = ObjectFIFOSubview[Attribute].from_element_type_and_shape(
             element_type, shape
         )
         super().__init__(
@@ -1048,7 +1049,9 @@ def __init__(
         shape: Iterable[int | IntAttr],
         name: str,
     ):
-        object_fifo = ObjectFIFO.from_element_type_and_shape(referenced_type, shape)
+        object_fifo = ObjectFIFO[Attribute].from_element_type_and_shape(
+            referenced_type, shape
+        )
         super().__init__(
             attributes={
                 "elemNumber": elemNumber,
@@ -1359,7 +1362,7 @@ class ShimDMAAllocationOp(IRDLOperation):
     name = "aie.shimDMAAllocation"
 
     sym_name = attr_def(StringAttr)
-    channelDir = attr_def(IntegerAttr[Annotated[IntegerType, i32]])
+    channelDir = attr_def(IntegerAttr[I32])
     channelIndex = attr_def(IntegerAttr[IntegerType])
     col = attr_def(IntegerAttr[IntegerType])
 

xdsl/dialects/memref.py

@@ -6,6 +6,7 @@
 from typing_extensions import Self
 
 from xdsl.dialects.builtin import (
+    I64,
     AnyFloat,
     AnyIntegerAttr,
     AnySignlessIntegerType,
@@ -369,7 +370,7 @@ class AtomicRMWOp(IRDLOperation):
     memref = operand_def(MemRefType[T])
     indices = var_operand_def(IndexType)
 
-    kind = prop_def(IntegerAttr[Annotated[IntegerType, i64]])
+    kind = prop_def(IntegerAttr[I64])
 
     result = result_def(T)
 
@@ -416,7 +417,7 @@ class Global(IRDLOperation):
     type: Attribute = prop_def(Attribute)
     initial_value: Attribute = prop_def(Attribute)
     constant = opt_prop_def(UnitAttr)
-    alignment = opt_prop_def(IntegerAttr[Annotated[IntegerType, IntegerType(64)]])
+    alignment = opt_prop_def(IntegerAttr[I64])
 
     traits = frozenset([SymbolOpInterface()])
 

xdsl/dialects/pdl.py

@@ -1,15 +1,16 @@
 from __future__ import annotations
 
 from collections.abc import Iterable, Sequence
-from typing import Annotated, Generic, TypeVar
+from typing import Generic, TypeVar
 
 from xdsl.dialects.builtin import (
+    I16,
+    I32,
     AnyArrayAttr,
     ArrayAttr,
     IntegerAttr,
     IntegerType,
     StringAttr,
-    i32,
 )
 from xdsl.ir import (
     Attribute,
@@ -564,9 +565,7 @@ class PatternOp(IRDLOperation):
     """
 
     name = "pdl.pattern"
-    benefit: IntegerAttr[Annotated[IntegerType, IntegerType(16)]] = prop_def(
-        IntegerAttr[Annotated[IntegerType, IntegerType(16)]]
-    )
+    benefit = prop_def(IntegerAttr[I16])
     sym_name: StringAttr | None = opt_prop_def(StringAttr)
     body: Region = region_def("single_block")
 
@@ -794,9 +793,7 @@ class ResultOp(IRDLOperation):
     """
 
     name = "pdl.result"
-    index: IntegerAttr[Annotated[IntegerType, i32]] = prop_def(
-        IntegerAttr[Annotated[IntegerType, i32]]
-    )
+    index = prop_def(IntegerAttr[I32])
     parent_: Operand = operand_def(OperationType)
     val: OpResult = result_def(ValueType)
 

xdsl/dialects/snitch_runtime.py

@@ -2,7 +2,16 @@
 from collections.abc import Sequence
 from typing import Annotated, Generic, TypeVar
 
-from xdsl.dialects.builtin import IndexType, IntegerAttr, IntegerType, i1, i32, i64
+from xdsl.dialects.builtin import (
+    I32,
+    I64,
+    IndexType,
+    IntegerAttr,
+    IntegerType,
+    i1,
+    i32,
+    i64,
+)
 from xdsl.ir import Attribute, Dialect, Operation, OpResult, SSAValue
 from xdsl.irdl import (
     AttrSizedOperandSegments,
@@ -358,7 +367,7 @@ def __init__(
 
 
 @irdl_op_definition
-class DmaStart1DOp(DmaStart1DBaseOperation[Annotated[Attribute, i32]]):
+class DmaStart1DOp(DmaStart1DBaseOperation[I32]):
     """
     Initiate an asynchronous 1D DMA transfer with 32-bits pointers
     """
@@ -367,7 +376,7 @@ class DmaStart1DOp(DmaStart1DBaseOperation[Annotated[Attribute, i32]]):
 
 
 @irdl_op_definition
-class DmaStart1DWideptrOp(DmaStart1DBaseOperation[Annotated[Attribute, i64]]):
+class DmaStart1DWideptrOp(DmaStart1DBaseOperation[I64]):
     """
     Initiate an asynchronous 1D DMA transfer with 64-bits wide pointers
     """
@@ -376,7 +385,7 @@ class DmaStart1DWideptrOp(DmaStart1DBaseOperation[Annotated[Attribute, i64]]):
 
 
 @irdl_op_definition
-class DmaStart2DOp(DmaStart2DBaseOperation[Annotated[Attribute, i32]]):
+class DmaStart2DOp(DmaStart2DBaseOperation[I32]):
     """
     Initiate an asynchronous 2D DMA transfer with 32-bits pointers
     """
@@ -385,7 +394,7 @@ class DmaStart2DOp(DmaStart2DBaseOperation[Annotated[Attribute, i32]]):
 
 
 @irdl_op_definition
-class DmaStart2DWideptrOp(DmaStart2DBaseOperation[Annotated[Attribute, i64]]):
+class DmaStart2DWideptrOp(DmaStart2DBaseOperation[I64]):
     """
     Initiate an asynchronous 2D DMA transfer with 64-bits wide pointers
     """