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Releases: wpmed92/RiscyD2

RiscyD2 v0.0.2

02 Jan 16:29
@wpmed92 wpmed92
0.0.2
38d7bfd
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RiscyD2 v0.0.2 Latest
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Fix csr cycle counter to count on every 100MHz cycle

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RiscyD2 v0.0.1

02 Jan 14:00
@wpmed92 wpmed92
0.0.1
72e7cdd
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RiscyD2 v0.0.1
  • Support base integer RISC-V instruction set with M (muldiv) extension support (Arch=RV32IM)
  • Add tools to interact with the board through UART
  • Basic assembler to compile small test programs
  • Python based emulator

Bitstream is included with the release to easily load it to the board.

Assets 3
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