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[aes] Base RTL implementation of GCM extension #43

[aes] Base RTL implementation of GCM extension

[aes] Base RTL implementation of GCM extension #43

Triggered via pull request November 11, 2024 15:19
Status Failure
Total duration 1d 0h 50m 18s
Artifacts 3

ci.yml

on: pull_request
Lint (slow)
12m 59s
Lint (slow)
Airgapped build
11m 9s
Airgapped build
Verible lint
1m 5s
Verible lint
Verilated English Breakfast
8m 17s
Verilated English Breakfast
CW305's Bitstream
0s
CW305's Bitstream
Build Docker Containers
2m 44s
Build Docker Containers
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8 errors
Lint (slow)
Countermeasure check failed.
Lint (slow)
Process completed with exit code 1.
Lint (slow)
Verilog style lint of DV sources with Verible failed. Run 'util/dvsim/dvsim.py -t veriblelint hw/top_earlgrey/lint/top_earlgrey_dv_lint_cfgs.hjson' and fix all errors.
Lint (slow)
Process completed with exit code 1.
Lint (slow)
Process completed with exit code 1.
Lint (slow)
Countermeasure check failed.
Lint (slow)
Process completed with exit code 1.
CW305's Bitstream
This request was automatically failed because there were no enabled runners online to process the request for more than 1 days.

Artifacts

Produced during runtime
Name Size
verilated_englishbreakfast
6.6 MB
vogelpi~opentitan~9K6UHH.dockerbuild
18.1 KB
vogelpi~opentitan~Z4O1K1.dockerbuild
97.6 KB