Skip to content

Commit

Permalink
removed trace
Browse files Browse the repository at this point in the history
  • Loading branch information
simond committed Nov 22, 2018
1 parent 2105b5c commit 44ff1e4
Showing 1 changed file with 3 additions and 2 deletions.
5 changes: 3 additions & 2 deletions riscv-target/riscvOVPsim/device/rv32ua/Makefile.include
Original file line number Diff line number Diff line change
Expand Up @@ -19,12 +19,13 @@ RUN_TARGET=\
--override riscvOVPsim/cpu/defaultsemihost=F \
--logfile $(work_dir_isa)/$@ \
--override riscvOVPsim/cpu/user_version=2.2 \
--override riscvOVPsim/cpu/priv_version=1.10 \
--trace --tracechange --traceshowicount; \
--override riscvOVPsim/cpu/priv_version=1.10 ; \
cat $(work_dir_isa)/$(*).signature.output | sed 's/.\{8\}/& /g' | \
awk '{print $$4 " " $$3 " " $$2 " " $$1}' | sed 's/ /\n/g' > temp; \
mv temp $(work_dir_isa)/$(*).signature.output;

# --trace --tracechange --traceshowicount;

RISCV_PREFIX ?= riscv32-unknown-elf-
RISCV_GCC ?= $(RISCV_PREFIX)gcc
RISCV_OBJDUMP ?= $(RISCV_PREFIX)objdump
Expand Down

0 comments on commit 44ff1e4

Please sign in to comment.