elfloader/riscv: always pass hart/core information #194
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Is there a chance to get this merged? |
Align the SMP and non-SMP ABI for kernel entry and pass on the hard ID obtained from the previous bootloader unconditionally. This allows the kernel to use the ID, e.g. when setting up the PLIC, so there is no need to require defining a platform specific hard-coded value. Furthermore, this change allows running a single core kernel in SMP configuration also. Signed-off-by: Axel Heider <[email protected]>
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Align the SMP and non-SMP ABI for kernel entry and pass on the hard ID obtained from the previous bootloader unconditionally. This allows the kernel to use the ID, e.g. when setting up the PLIC, so there is no need to require defining a platform specific hard-codes value. Furthermore, this change allows running a single core kernel in SMP configuration also.
The long term goal if this change is removing the need to have the explicit
CONFIG_FIRST_HART_IDin the seL4 kernel. It will just use the ID that is passed (unless platforms configure something else due to special needs). That aligns the behavior a bit to ARM, where we can read the current core ID from a register in case it is needed somewhere, so there is no need to configure this explicitly. Unfortunately, RISC-V does not have such a register here.