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Move verilator calls to inside Haskell test program
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Original file line number | Diff line number | Diff line change |
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module Main (main) where | ||
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import Lava | ||
import System.Process | ||
-- import Data.VCD | ||
import Lava.Examples.NandGate | ||
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main :: IO () | ||
main | ||
= do writeSystemVerilog nandGateTop | ||
writeSystemVerilogSimulation nandGateTop [[L, L], [H, L], [L, H], [H, H]] | ||
callProcess "verilator" ["+1800-2017ext+sv", "verilator.vlt", "--binary", "--trace", "-Wall", "--top-module", "nandgate_sim", "nandgate.sv", "nandgate_sim.sv"] | ||
callProcess "obj_dir/Vnandgate_sim" ["+trace"] | ||
-- vcd_contents <- readFile "nandgate_sim.vcd" | ||
-- putStrLn (show (parseVCD vcd_contents)) |
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