Merge pull request #245 from rmsyn/riscv/mstatus-csr-macro

riscv: define mstatus using CSR macro

riscv/CHANGELOG.md

@@ -23,6 +23,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 - Use CSR helper macros to define `mimpid` register
 - Use CSR helper macros to define `misa` register
 - Use CSR helper macros to define `mip` register
+- Use CSR helper macros to define `mstatus` register
 
 ## [v0.12.1] - 2024-10-20
 

riscv/src/lib.rs

@@ -34,6 +34,7 @@
 
 #![no_std]
 #![allow(clippy::missing_safety_doc)]
+#![allow(clippy::eq_op)]
 
 pub use paste::paste;
 

riscv/src/register/macros.rs

@@ -669,14 +669,20 @@ macro_rules! csr_field_enum {
     ($(#[$field_ty_doc:meta])*
      $field_ty:ident {
          default: $default_variant:ident,
-         $($variant:ident = $value:expr$(,)?)+
+         $(
+             $(#[$field_doc:meta])*
+             $variant:ident = $value:expr$(,)?
+          )+
      }$(,)?
     ) => {
          $(#[$field_ty_doc])*
          #[repr(usize)]
          #[derive(Clone, Copy, Debug, Eq, PartialEq)]
          pub enum $field_ty {
-             $($variant = $value),+
+             $(
+                 $(#[$field_doc])*
+                 $variant = $value
+             ),+
          }
 
          impl $field_ty {
@@ -1098,4 +1104,13 @@ macro_rules! test_csr_field {
             assert_eq!($reg.[<try_set_ $field>]($index, false), Err($err));
         }
     }};
+
+    // test an enum bit field
+    ($reg:ident, $field:ident: $var:expr) => {{
+        $crate::paste! {
+            $reg.[<set_ $field>]($var);
+            assert_eq!($reg.$field(), $var);
+            assert_eq!($reg.[<try_ $field>](), Ok($var));
+        }
+    }};
 }