Bump version: 0.13.1 → 0.14.0

riscv-software-src · Aug 8, 2022 · acd5220 · acd5220
1 parent 05b9128
commit acd5220
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Showing 4 changed files with 9 additions and 3 deletions.
diff --git a/CHANGELOG.md b/CHANGELOG.md
@@ -2,6 +2,12 @@
 
 This project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0.html).
 
+## [0.14.0] - 2022-08-08
+- Add fields to instruction object
+- Enable generic coverage evaluation mechanisms for floating point instructions
+- Fix coverpoint generation to account for nan boxing of fp instructions.
+- Add fields(frm, fcsr, nan_prefix) for fp instructions
+
 ## [0.13.2] - 2022-05-23
 - Error reporting for missing coverlabel in cgf file
 

diff --git a/riscv_isac/__init__.py b/riscv_isac/__init__.py
@@ -4,4 +4,4 @@
 
 __author__ = """InCore Semiconductors Pvt Ltd"""
 __email__ = '[email protected]'
-__version__ = '0.13.2'
+__version__ = '0.14.0'
diff --git a/setup.cfg b/setup.cfg
@@ -1,5 +1,5 @@
 [bumpversion]
-current_version = 0.13.2
+current_version = 0.14.0
 commit = True
 tag = True
 

diff --git a/setup.py b/setup.py
@@ -26,7 +26,7 @@ def read_requires():
 
 setup(
     name='riscv_isac',
-    version='0.13.2',
+    version='0.14.0',
     description="RISC-V ISAC",
     long_description=readme + '\n\n',
     classifiers=[