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Releases: riscv-non-isa/riscv-arch-test

3.6.0

25 Jan 20:05
af1d7e1
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  • Removed the bugs in RVTEST_GOTO_LOWER_MODE macro
    • Removed the bugs in RVTEST_GOTO_MMODE macro and defined strap_routine directive.
    • Updated RVTEST_TRAP_SAVEAREA and RVTEST_TRAP_EPILOG macros to refine the definitions of per mode save area macros.
    • Added better indications of when the trap signature area is overrun
    • Ensured that the trap handler keeps the trampoline 64B aligned (need for CLIC spec)
    • fixed the handling of when xTVEC was not initialized and also could not be written
    • rewritten the save_GPR macro to it now compiles
    • some miscellaneous optimizations

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3.5.3

27 Dec 08:13
933dddd
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  • Fix Canary definition according to sigalign.
    • Fix SIGALIGN definition.
    • Fix inconsistencies in tests.
    • Add Zicsr to ISA in RV32 privilege tests
    • Modify signature size requirement to multiple of 4.

3.5.2

01 Dec 06:57
e302d3b
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  • adding a pull request template
    • removed riscv-test-stats directory and migrated those to a gdrive folder here
    • updated contribution guide on steps to done to upload test stats for PRs

3.5.1

28 Oct 06:28
b8e2315
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  • Add test cases for P-ext
    • Correct TEST_PKRR_OP() macro in arch_test.h
    • Avoid reusing RVTEST_SIGUPD_FID() for P-ext macros: SIGALIGN may not be defined when FLEN==0

3.5.0

18 Oct 12:39
e4d1f32
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  • Add Canaries (labels - sig_begin_canary. tsig_begin_canary, tsig_end_canary, sig_end_canary)
  • Signature boundary labels (rvtest_sig_begin and rvtest_sig_end) (enables the new trap handler to fix #262)
  • Zicsr ISA update for priv tests (#233)
  • Default data section should be 16 bytes. This expands default rvtest_data region to be at least 16 bytes (#211)
  • Replace la/li ops with LA/LI macros in tests (#275)
  • Remove trap handler enable macro from misalign1-jalr tests (#281)
  • Move misalign1-jalr test into I directory. (#281)
  • Move fmem tests into the [F|D]/src directory
  • Fix correctval in tests to ?? instead of 0. (#256)
  • Remove the riscv-target directory (#259)
  • Fix the store instruction used in 64bit K tests from sw to SREG (#282)

3.4.1

14 Sep 07:51
da638ba
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  • Fix trailing space in arch_test.h

3.4.0

07 Sep 13:55
331b0cd
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  • Added tests for Bitmanip and Crypto scalar extensions

3.3.0

26 Aug 06:24
948b525
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  • Added floating point aligned memory operations tests.

3.2.1

02 Aug 14:52
da19b4b
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  • Fix invalid link in README.adoc

3.2.0

19 Jul 16:07
e5020bf
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  • Add definition of LREGWU according to XLEN.
    • Fix corresponding fcvt.*.wu tests.