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drm/i915: Add 'render basic' Gen8+ OA unit configs
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Adds a static OA unit, MUX, B Counter + Flex EU configurations for basic
render metrics on Broadwell, Cherryview and Skylake. These are
autogenerated from an internal XML description of metric sets.

Signed-off-by: Robert Bragg <[email protected]>
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@rib
rib committed Jan 27, 2016
1 parent 6a74db5 commit ac938f3
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Showing 8 changed files with 960 additions and 1 deletion.
5 changes: 4 additions & 1 deletion drivers/gpu/drm/i915/Makefile
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Expand Up @@ -95,7 +95,10 @@ i915-y += i915_vgpu.o

# perf code
i915-y += i915_perf.o \
i915_oa_hsw.o
i915_oa_hsw.o \
i915_oa_bdw.o \
i915_oa_chv.o \
i915_oa_skl.o

# legacy horrors
i915-y += i915_dma.o
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2 changes: 2 additions & 0 deletions drivers/gpu/drm/i915/i915_drv.h
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Expand Up @@ -2062,6 +2062,8 @@ struct drm_i915_private {
int mux_regs_len;
const struct i915_oa_reg *b_counter_regs;
int b_counter_regs_len;
const struct i915_oa_reg *flex_regs;
int flex_regs_len;

struct {
struct drm_i915_gem_object *obj;
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355 changes: 355 additions & 0 deletions drivers/gpu/drm/i915/i915_oa_bdw.c
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@@ -0,0 +1,355 @@
/*
* Autogenerated file, DO NOT EDIT manually!
*
* Copyright (c) 2015 Intel Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
* IN THE SOFTWARE.
*
*/

#include <linux/sysfs.h>

#include "i915_drv.h"

enum metric_set_id {
METRIC_SET_ID_RENDER_BASIC = 1,
};

int i915_oa_n_builtin_metric_sets_bdw = 1;

static const struct i915_oa_reg b_counter_config_render_basic[] = {
{ 0x2710, 0x00000000 },
{ 0x2714, 0x00800000 },
{ 0x2720, 0x00000000 },
{ 0x2724, 0x00800000 },
};

static const struct i915_oa_reg flex_eu_config_render_basic[] = {
{ 0xE458, 0x00005004 },
{ 0xE558, 0x00010003 },
{ 0xE658, 0x00012011 },
{ 0xE758, 0x00015014 },
{ 0xE45c, 0x00051050 },
{ 0xE55c, 0x00053052 },
{ 0xE65c, 0x00055054 },
};

static const struct i915_oa_reg mux_config_render_basic_1_0_slices_0x01[] = {
{ 0x9888, 0x143F000F },
{ 0x9888, 0x14110014 },
{ 0x9888, 0x14310014 },
{ 0x9888, 0x14BF000F },
{ 0x9888, 0x13837BE0 },
{ 0x9888, 0x3B800060 },
{ 0x9888, 0x3D800005 },
{ 0x9888, 0x005C4000 },
{ 0x9888, 0x065C8000 },
{ 0x9888, 0x085CC000 },
{ 0x9888, 0x003D8000 },
{ 0x9888, 0x183D0800 },
{ 0x9888, 0x0A3F0023 },
{ 0x9888, 0x103F0000 },
{ 0x9888, 0x00584000 },
{ 0x9888, 0x08584000 },
{ 0x9888, 0x0A5A4000 },
{ 0x9888, 0x005B4000 },
{ 0x9888, 0x0E5B8000 },
{ 0x9888, 0x185B2400 },
{ 0x9888, 0x0A1D4000 },
{ 0x9888, 0x0C1F0800 },
{ 0x9888, 0x0E1FAA00 },
{ 0x9888, 0x00384000 },
{ 0x9888, 0x0E384000 },
{ 0x9888, 0x16384000 },
{ 0x9888, 0x18380001 },
{ 0x9888, 0x00392000 },
{ 0x9888, 0x06398000 },
{ 0x9888, 0x0839A000 },
{ 0x9888, 0x0A391000 },
{ 0x9888, 0x00104000 },
{ 0x9888, 0x08104000 },
{ 0x9888, 0x00110030 },
{ 0x9888, 0x08110031 },
{ 0x9888, 0x10110000 },
{ 0x9888, 0x00134000 },
{ 0x9888, 0x16130020 },
{ 0x9888, 0x06308000 },
{ 0x9888, 0x08308000 },
{ 0x9888, 0x06311800 },
{ 0x9888, 0x08311880 },
{ 0x9888, 0x10310000 },
{ 0x9888, 0x0E334000 },
{ 0x9888, 0x16330080 },
{ 0x9888, 0x0ABF1180 },
{ 0x9888, 0x10BF0000 },
{ 0x9888, 0x0ADA8000 },
{ 0x9888, 0x0A9D8000 },
{ 0x9888, 0x109F0002 },
{ 0x9888, 0x0AB94000 },
{ 0x9888, 0x0D888000 },
{ 0x9888, 0x018A8000 },
{ 0x9888, 0x0F8A8000 },
{ 0x9888, 0x198A8000 },
{ 0x9888, 0x1B8A00A0 },
{ 0x9888, 0x238B0020 },
{ 0x9888, 0x258B2550 },
{ 0x9888, 0x198C1000 },
{ 0x9888, 0x0B8D8000 },
{ 0x9888, 0x1F85AA80 },
{ 0x9888, 0x2185AAA0 },
{ 0x9888, 0x2385002A },
{ 0x9888, 0x0D831021 },
{ 0x9888, 0x0F83572F },
{ 0x9888, 0x01835680 },
{ 0x9888, 0x038315AC },
{ 0x9888, 0x0583002A },
{ 0x9888, 0x11830000 },
{ 0x9888, 0x19835400 },
{ 0x9888, 0x1B830001 },
{ 0x9888, 0x07830000 },
{ 0x9888, 0x09830000 },
{ 0x9888, 0x0184C000 },
{ 0x9888, 0x07848000 },
{ 0x9888, 0x0984C000 },
{ 0x9888, 0x0B84C000 },
{ 0x9888, 0x0D84C000 },
{ 0x9888, 0x0F84C000 },
{ 0x9888, 0x0384C000 },
{ 0x9888, 0x05844000 },
{ 0x9888, 0x1B80C137 },
{ 0x9888, 0x1D80C147 },
{ 0x9888, 0x21800000 },
{ 0x9888, 0x1180C000 },
{ 0x9888, 0x17808000 },
{ 0x9888, 0x1980C000 },
{ 0x9888, 0x1F80C000 },
{ 0x9888, 0x1380C000 },
{ 0x9888, 0x15804000 },
{ 0x0D24, 0x00000000 },
{ 0x9888, 0x4D801110 },
{ 0x9888, 0x4F800331 },
{ 0x9888, 0x43800802 },
{ 0x9888, 0x51800000 },
{ 0x9888, 0x45801465 },
{ 0x9888, 0x53801111 },
{ 0x9888, 0x478014A5 },
{ 0x9888, 0x31800000 },
{ 0x9888, 0x3F8014A5 },
{ 0x9888, 0x41800005 },
};

static const struct i915_oa_reg mux_config_render_basic_1_1_slices_0x02[] = {
{ 0x9888, 0x143F000F },
{ 0x9888, 0x14BF000F },
{ 0x9888, 0x14910014 },
{ 0x9888, 0x14B10014 },
{ 0x9888, 0x13837BE0 },
{ 0x9888, 0x3B800060 },
{ 0x9888, 0x3D800005 },
{ 0x9888, 0x0A3F0023 },
{ 0x9888, 0x103F0000 },
{ 0x9888, 0x0A5A4000 },
{ 0x9888, 0x0A1D4000 },
{ 0x9888, 0x0E1F8000 },
{ 0x9888, 0x0A391000 },
{ 0x9888, 0x00DC4000 },
{ 0x9888, 0x06DC8000 },
{ 0x9888, 0x08DCC000 },
{ 0x9888, 0x00BD8000 },
{ 0x9888, 0x18BD0800 },
{ 0x9888, 0x0ABF1180 },
{ 0x9888, 0x10BF0000 },
{ 0x9888, 0x00D84000 },
{ 0x9888, 0x08D84000 },
{ 0x9888, 0x0ADA8000 },
{ 0x9888, 0x00DB4000 },
{ 0x9888, 0x0EDB8000 },
{ 0x9888, 0x18DB2400 },
{ 0x9888, 0x0A9D8000 },
{ 0x9888, 0x0C9F0800 },
{ 0x9888, 0x0E9F2A00 },
{ 0x9888, 0x109F0002 },
{ 0x9888, 0x00B84000 },
{ 0x9888, 0x0EB84000 },
{ 0x9888, 0x16B84000 },
{ 0x9888, 0x18B80001 },
{ 0x9888, 0x00B92000 },
{ 0x9888, 0x06B98000 },
{ 0x9888, 0x08B9A000 },
{ 0x9888, 0x0AB94000 },
{ 0x9888, 0x00904000 },
{ 0x9888, 0x08904000 },
{ 0x9888, 0x00910030 },
{ 0x9888, 0x08910031 },
{ 0x9888, 0x10910000 },
{ 0x9888, 0x00934000 },
{ 0x9888, 0x16930020 },
{ 0x9888, 0x06B08000 },
{ 0x9888, 0x08B08000 },
{ 0x9888, 0x06B11800 },
{ 0x9888, 0x08B11880 },
{ 0x9888, 0x10B10000 },
{ 0x9888, 0x0EB34000 },
{ 0x9888, 0x16B30080 },
{ 0x9888, 0x01888000 },
{ 0x9888, 0x0D88B800 },
{ 0x9888, 0x1B8A0080 },
{ 0x9888, 0x238B0040 },
{ 0x9888, 0x258B26A0 },
{ 0x9888, 0x018C4000 },
{ 0x9888, 0x0F8C4000 },
{ 0x9888, 0x178C2000 },
{ 0x9888, 0x198C1100 },
{ 0x9888, 0x018D2000 },
{ 0x9888, 0x078D8000 },
{ 0x9888, 0x098DA000 },
{ 0x9888, 0x0B8D8000 },
{ 0x9888, 0x1F85AA80 },
{ 0x9888, 0x2185AAA0 },
{ 0x9888, 0x2385002A },
{ 0x9888, 0x0D831021 },
{ 0x9888, 0x0F83572F },
{ 0x9888, 0x01835680 },
{ 0x9888, 0x038315AC },
{ 0x9888, 0x0583002A },
{ 0x9888, 0x11830000 },
{ 0x9888, 0x19835400 },
{ 0x9888, 0x1B830001 },
{ 0x9888, 0x07830000 },
{ 0x9888, 0x09830000 },
{ 0x9888, 0x0184C000 },
{ 0x9888, 0x07848000 },
{ 0x9888, 0x0984C000 },
{ 0x9888, 0x0B84C000 },
{ 0x9888, 0x0D84C000 },
{ 0x9888, 0x0F84C000 },
{ 0x9888, 0x0384C000 },
{ 0x9888, 0x05844000 },
{ 0x9888, 0x1B80C137 },
{ 0x9888, 0x1D80C147 },
{ 0x9888, 0x21800000 },
{ 0x9888, 0x1180C000 },
{ 0x9888, 0x17808000 },
{ 0x9888, 0x1980C000 },
{ 0x9888, 0x1F80C000 },
{ 0x9888, 0x1380C000 },
{ 0x9888, 0x15804000 },
{ 0x0D24, 0x00000000 },
{ 0x9888, 0x4D805550 },
{ 0x9888, 0x4F800335 },
{ 0x9888, 0x43800802 },
{ 0x9888, 0x51800400 },
{ 0x9888, 0x458004A1 },
{ 0x9888, 0x53805555 },
{ 0x9888, 0x47800421 },
{ 0x9888, 0x31800000 },
{ 0x9888, 0x3F800421 },
{ 0x9888, 0x41800841 },
};

static int select_render_basic_config(struct drm_i915_private *dev_priv)
{
if (INTEL_INFO(dev_priv)->slice_mask & 0x01) {
dev_priv->perf.oa.mux_regs =
mux_config_render_basic_1_0_slices_0x01;
dev_priv->perf.oa.mux_regs_len =
ARRAY_SIZE(mux_config_render_basic_1_0_slices_0x01);
} else if (INTEL_INFO(dev_priv)->slice_mask & 0x02) {
dev_priv->perf.oa.mux_regs =
mux_config_render_basic_1_1_slices_0x02;
dev_priv->perf.oa.mux_regs_len =
ARRAY_SIZE(mux_config_render_basic_1_1_slices_0x02);
} else {
DRM_DEBUG_DRIVER("No suitable MUX config for \"RENDER_BASIC\" metric set");
return -EINVAL;
}

dev_priv->perf.oa.b_counter_regs =
b_counter_config_render_basic;
dev_priv->perf.oa.b_counter_regs_len =
ARRAY_SIZE(b_counter_config_render_basic);

dev_priv->perf.oa.flex_regs =
flex_eu_config_render_basic;
dev_priv->perf.oa.flex_regs_len =
ARRAY_SIZE(flex_eu_config_render_basic);

return 0;
}

int i915_oa_select_metric_set_bdw(struct drm_i915_private *dev_priv)
{
dev_priv->perf.oa.mux_regs = NULL;
dev_priv->perf.oa.mux_regs_len = 0;
dev_priv->perf.oa.b_counter_regs = NULL;
dev_priv->perf.oa.b_counter_regs_len = 0;
dev_priv->perf.oa.flex_regs = NULL;
dev_priv->perf.oa.flex_regs_len = 0;

switch (dev_priv->perf.oa.metrics_set) {
case METRIC_SET_ID_RENDER_BASIC:
return select_render_basic_config(dev_priv);
default:
return -ENODEV;
}
}

static ssize_t
show_render_basic_id(struct device *kdev, struct device_attribute *attr, char *buf)
{
return sprintf(buf, "%d\n", METRIC_SET_ID_RENDER_BASIC);
}

static struct device_attribute dev_attr_render_basic_id = {
.attr = { .name = "id", .mode = S_IRUGO },
.show = show_render_basic_id,
.store = NULL,
};

static struct attribute *attrs_render_basic[] = {
&dev_attr_render_basic_id.attr,
NULL,
};

static struct attribute_group group_render_basic = {
.name = "b541bd57-0e0f-4154-b4c0-5858010a2bf7",
.attrs = attrs_render_basic,
};

int
i915_perf_init_sysfs_bdw(struct drm_i915_private *dev_priv)
{
int ret;

ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_render_basic);
if (ret)
goto error_render_basic;

return 0;

error_render_basic:
return ret;
}

void
i915_perf_deinit_sysfs_bdw(struct drm_i915_private *dev_priv)
{
sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_render_basic);
}
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