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Introduce a tier 1 JIT compiler based on x86-64 architecture
When the using frequency of a block exceeds a predetermined threshold, the tier 1 JIT compiler traces the chained block and generate corresponding low quailty machine code. The resulting target machine code is stored in the code cache for future utilization. The primary objective of introducing the tier 1 JIT compiler is to enhance the execution speed of RISC-V instructions. This implementation requires two additional components: a tier 1 machine code generator, and code cache. Furthermore, this tier 1 JIT compiler serves as the foundational target for future improvements. In addition, we have developed a Python script that effectively traces code templates and automatically generates JIT code templates. This approach eliminates the need for manually writing duplicated code. As shown in the performance analysis below, the tier 1 JIT compiler's performance closely parallels that of QEMU in benchmarks with a constrained dynamic instruction count. However, for benchmarks featuring a substantial dynamic instruction count or lacking specific hotspots—examples include pi and STRINGSORT—the tier 1 JIT compiler demonstrates noticeably slower execution compared to QEMU. Hence, a robust tier 2 compiler is essential to generate optimized machine code across diverse execution paths, coupled with a runtime profiler for detecting hotspots. | Metric | rv32emu(JIT-T1) | qemu | |----------+-----------------+-------| |aes | 0.02| 0.031| |mandelbrot| 0.029| 0.0115| |puzzle | 0.0115| 0.009| |pi | 0.0413| 0.0177| |dhrystone | 0.331| 0.393| |Nqeueens | 0.854| 0.749| |qsort-O2 | 2.384| 2.16| |miniz-O2 | 1.33| 1.01| |primes-O2 | 2.93| 1.069| |sha512-O2 | 2.057| 0.939| |stream | 12.747| 10.36| |STRINGSORT| 89.012| 11.496| Related: sysprog21#238
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@@ -21,3 +21,4 @@ build/path/ | |
tests/**/*.elf | ||
tests/arch-test-target/config.ini | ||
__pycache__/ | ||
src/rv32_jit_template.c |
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