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Introduce a tier-1 JIT compiler based on aarch64 architecture
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We follow the template and API of X64 to implement A64 tier-1 JIT compiler.

* Perfromance
| Metric   | rv32emu-T1C | qemu  |
|----------+-------------+-------|
|aes	   |        0.034|  0.045|
|puzzle	   |       0.0115| 0.0169|
|pi        |        0.035|  0.032|
|dhrystone |	    1.914|  2.005|
|Nqeueens  |	     3.87|  2.898|
|qsort-O2  |	    7.819| 11.614|
|miniz-O2  |	    7.604|  3.803|
|primes-O2 |	   10.551|  5.986|
|sha512-O2 |	    6.497|  2.853|
|stream	   |        52.25| 45.776|

As demonstrated in the memory usage analysis below, the tier-1 JIT
compiler utilizes less memory than QEMU across all benchmarks.

* Memory usage
| Metric   | rv32emu-T1C |   qemu  |
|----------+-------------+---------|
|aes	   |      183,212|1,265,962|
|puzzle	   |      145,239|  891,357|
|pi        |      144,739|  872,525|
|dhrystone |	  146,282|  853,256|
|Nqeueens  |	  146,696|  854,174|
|qsort-O2  |	  146,907|  856,721|
|miniz-O2  |	  157,475|  999,897|
|primes-O2 |	  142,356|  851,661|
|sha512-O2 |	  145,369|  901,136|
|stream	   |      157,975|  955,809|

Related: sysprog21#238
Close: sysprog21#296
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qwe661234 committed Dec 25, 2023
1 parent f484a4b commit 406a4dc
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Showing 13 changed files with 2,198 additions and 1,532 deletions.
1 change: 1 addition & 0 deletions .github/workflows/main.yml
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Expand Up @@ -58,6 +58,7 @@ jobs:
run: |
make
make check
make ENABLE_JIT=1 clean check
coding-style:
runs-on: ubuntu-22.04
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2 changes: 1 addition & 1 deletion .gitignore
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Expand Up @@ -21,4 +21,4 @@ build/path/
tests/**/*.elf
tests/arch-test-target/config.ini
__pycache__/
src/rv32_jit_template.c
src/rv32_jit.c
12 changes: 6 additions & 6 deletions Makefile
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Expand Up @@ -121,15 +121,15 @@ endif
ENABLE_JIT ?= 0
$(call set-feature, JIT)
ifeq ($(call has, JIT), 1)
OBJS_EXT += jit_x64.o
ifneq ($(processor), x86_64)
$(error JIT mode only supports for x64 target currently.)
OBJS_EXT += jit.o
ifneq ($(processor),$(filter $(processor),x86_64 aarch64 arm64))
$(error JIT mode only supports for x64 and arm64 target currently.)
endif

src/rv32_jit_template.c:
src/rv32_jit.c:
$(Q)tools/gen-jit-template.py $(CFLAGS) > $@

$(OUT)/jit_x64.o: src/jit_x64.c src/rv32_jit_template.c
$(OUT)/jit.o: src/jit.c src/rv32_jit.c
$(VECHO) " CC\t$@\n"
$(Q)$(CC) -o $@ $(CFLAGS) -c -MMD -MF $@.d $<
endif
Expand Down Expand Up @@ -235,7 +235,7 @@ endif
endif

clean:
$(RM) $(BIN) $(OBJS) $(HIST_BIN) $(HIST_OBJS) $(deps) $(CACHE_OUT) src/rv32_jit_template.c
$(RM) $(BIN) $(OBJS) $(HIST_BIN) $(HIST_OBJS) $(deps) $(CACHE_OUT) src/rv32_jit.c
distclean: clean
-$(RM) $(DOOM_DATA) $(QUAKE_DATA)
$(RM) -r $(OUT)/id1
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1 change: 1 addition & 0 deletions README.md
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Expand Up @@ -81,6 +81,7 @@ The image containing all the necessary tools for development and testing can be
* `ENABLE_Zifencei`: Instruction-Fetch Fence
* `ENABLE_GDBSTUB` : GDB remote debugging support
* `ENABLE_SDL` : Experimental Display and Event System Calls
* `ENABLE_JIT` : Experimental JIT compiler

e.g., run `make ENABLE_EXT_F=0` for the build without floating-point support.

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4 changes: 2 additions & 2 deletions src/emulate.c
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Expand Up @@ -27,7 +27,7 @@ extern struct target_ops gdbstub_ops;

#if RV32_HAS(JIT)
#include "cache.h"
#include "jit_x64.h"
#include "jit.h"
#endif

/* Shortcuts for comparing each field of specified RISC-V instruction */
Expand Down Expand Up @@ -1067,7 +1067,7 @@ void rv_step(riscv_t *rv, int32_t cycles)
cache_freq(rv->block_cache, block->pc_start) >= 1024) ||
cache_hot(rv->block_cache, block->pc_start))) {
block->hot = true;
block->offset = translate_x64(rv, block);
block->offset = jit_translate(rv, block);
((exec_block_func_t) state->buf)(
rv, (uintptr_t) (state->buf + block->offset));
prev = NULL;
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