Tune Buffer sizes

pulp-platform · Jul 29, 2024 · eff77ac · eff77ac
1 parent 79a364e
commit eff77ac
Show file tree

Hide file tree

Showing 3 changed files with 15 additions and 9 deletions.
diff --git a/src/axi_memory_island_wrap.sv b/src/axi_memory_island_wrap.sv
@@ -163,7 +163,10 @@ module axi_memory_island_wrap #(
       .reg_rsp_t      ( dma_reg_rsp_t   ),
       .AddrWidth      ( AddrWidth       ),
       .NarrowDataWidth( NarrowDataWidth ),
-      .WideDataWidth  ( WideDataWidth   )
+      .WideDataWidth  ( WideDataWidth   ),
+      .MemoryLatency  ( SpillWideReqEntry + SpillWideReqRouted + SpillWideReqSplit +
+                        SpillWideRspSplit + SpillWideRspRouted + SpillWideRspEntry +
+                        SpillReqBank + SpillRspBank + 1 )
     ) i_dma (
       .clk_i,
       .rst_ni,

diff --git a/src/dma/memory_island_dma.sv b/src/dma/memory_island_dma.sv
@@ -18,6 +18,8 @@ module memory_island_dma #(
   parameter int unsigned NarrowDataWidth      = 0,
   /// Data Width for the Wide Ports
   parameter int unsigned WideDataWidth        = 0,
+  /// Latency of downstream memory for
+  parameter int unsigned MemoryLatency        = 2,
   // Derived, DO NOT OVERRIDE
   parameter int unsigned NarrowStrbWidth      = NarrowDataWidth/8,
   parameter int unsigned WideStrbWidth        = WideDataWidth/8
@@ -177,10 +179,10 @@ module memory_island_dma #(
     .AddrWidth           ( AddrWidth ),
     .UserWidth           ( 1 ), // unused internally, needs >0
     .AxiIdWidth          ( 1 ),
-    .NumAxInFlight       ( 3 ),
+    .NumAxInFlight       ( MemoryLatency ),
     .BufferDepth         ( 3 ),
     .TFLenWidth          ( TFLenWidth ),
-    .MemSysDepth         ( 3 ),
+    .MemSysDepth         ( MemoryLatency + 2 ),
     .CombinedShifter     ( 1'b0 ),
     .RAWCouplingAvail    ( 1'b0 ),
     .MaskInvalidData     ( 1'b1 ),
@@ -252,10 +254,10 @@ module memory_island_dma #(
     );
 
     obi_rready_converter #(
-      .obi_a_chan_t( obi_a_chan_t ),
-      .obi_r_chan_t( obi_r_chan_t ),
-      .Depth       ( 2            ),
-      .CombRspReq  ( 1'b1         )
+      .obi_a_chan_t( obi_a_chan_t  ),
+      .obi_r_chan_t( obi_r_chan_t  ),
+      .Depth       ( MemoryLatency ),
+      .CombRspReq  ( 1'b1          )
     ) i_obi_rready_converter (
       .clk_i,
       .rst_ni,

diff --git a/src/memory_island_core.sv b/src/memory_island_core.sv
@@ -524,8 +524,9 @@ module memory_island_core #(
       .RUserWidth ( 1                                  ),
       .NumBanks   ( NWDivisor                          ),
       .HideStrb   ( 1'b1                               ),
-      .MaxTrans   ( 2                                  ), // TODO tune?
-      .FifoDepth  ( 3                                  )  // TODO tune?
+      .MaxTrans   ( SpillWideReqSplit + SpillReqBank +
+                    SpillWideRspSplit + SpillRspBank + 1 ),
+      .FifoDepth  ( 3                                  )
     ) i_wide_to_banks (
       .clk_i,
       .rst_ni,