Move verilog-lint waivers in-file

pulp-platform · Aug 6, 2024 · c303b4d · c303b4d
1 parent 4079679
commit c303b4d
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Showing 4 changed files with 3 additions and 7 deletions.
diff --git a/.github/verible.waiver b/.github/verible.waiver
diff --git a/.github/workflows/lint.yml b/.github/workflows/lint.yml
@@ -24,6 +24,6 @@ jobs:
             ./src
             ./test
           exclude_paths:
-          extra_args: "--waiver_files .github/verible.waiver --rules=-interface-name-style --lint_fatal --parse_fatal"
+          extra_args: "--rules=-interface-name-style --lint_fatal --parse_fatal"
           github_token: ${{ secrets.GITHUB_TOKEN }}
           reviewdog_reporter: github-check
diff --git a/src/axi_memory_island_wrap.sv b/src/axi_memory_island_wrap.sv
@@ -56,6 +56,7 @@ module axi_memory_island_wrap #(
   parameter int unsigned NarrowExtraBF        = 1,
   /// Words per memory bank. (Total number of banks is (WideWidth/NarrowWidth)*NumWideBanks)
   parameter int unsigned WordsPerBank         = 1024,
+  // verilog_lint: waive explicit-parameter-storage-type
   parameter              MemorySimInit        = "none"
 ) (
   input  logic                               clk_i,

diff --git a/src/memory_island_core.sv b/src/memory_island_core.sv
@@ -40,6 +40,7 @@ module memory_island_core #(
   parameter int unsigned SpillReqBank         = 0,
   parameter int unsigned SpillRspBank         = 0,
 
+  // verilog_lint: waive explicit-parameter-storage-type
   parameter              MemorySimInit        = "none",
 
   /// Relinquish narrow priority after x cycles, 0 for never. Requires SpillNarrowReqRouted==0.