Add vsim bare test to CI

pulp-platform · Aug 8, 2024 · 70b750a · 70b750a
1 parent 728cbf9
commit 70b750a
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Showing 3 changed files with 5 additions and 2 deletions.
diff --git a/Makefile b/Makefile
@@ -19,6 +19,9 @@ test-vsim: scripts/compile.tcl
 	$(VSIM) -64 -c -do "quit -code [source scripts/compile.tcl]"
 	$(VSIM) -64 -do "vsim axi_memory_island_tb -voptargs=+acc; do scripts/debug_wave.do"
 
+test-vsim-bare: scripts/compile.tcl
+	$(VSIM) -64 -c -do "quit -code [source scripts/compile.tcl]"
+	$(VSIM) -64 -c -do "vsim axi_memory_island_tb; run -all"
 
 ## Internal CI
 NONFREE_REMOTE ?= [email protected]:pulp-restricted/memory_island_nonfree.git

diff --git a/test/axi_memory_island_tb.sv b/test/axi_memory_island_tb.sv
@@ -696,7 +696,7 @@ module axi_memory_island_tb #(
       errors += $countones(mismatch);
       if (end_of_sim == '1) begin
         $display("Counted %d errors.", errors);
-        $stop();
+        $finish(errors);
       end
       @(posedge clk);
     end while (1'b1);

diff --git a/test/synth/axi_memory_island_synth.sv b/test/synth/axi_memory_island_synth.sv
@@ -290,7 +290,7 @@ module axi_memory_island_synth #(
     .SpillWideRspRouted  (0),
     .SpillWideReqSplit   (0),
     .SpillWideRspSplit   (0),
-    .SpillReqBank        (0),
+    .SpillReqBank        (1),
     .SpillRspBank        (1),
     .WidePriorityWait    (2)
   ) i_mem_island (