Add parameter to configure AXI ports as read-write or read-/write-only #12
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[verible-verilog-lint] src/axi_memory_island_wrap.sv#L114:
src/axi_memory_island_wrap.sv#L114
Non-type localparam names must be styled with CamelCase [Style: constants] [parameter-name-style]
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[verible-verilog-lint] src/axi_memory_island_wrap.sv#L174:
src/axi_memory_island_wrap.sv#L174
Non-type localparam names must be styled with CamelCase [Style: constants] [parameter-name-style]
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