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Fixed isacov rd/rs-issues for zb* instructions (ISA_DECODER only)
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Signed-off-by: Henrik Fegran <[email protected]>
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silabs-hfegran committed Oct 3, 2023
1 parent 3ac5ef6 commit cb2b643
Showing 1 changed file with 7 additions and 1 deletion.
8 changes: 7 additions & 1 deletion lib/uvm_agents/uvma_isacov/uvma_isacov_mon.sv
Original file line number Diff line number Diff line change
Expand Up @@ -329,7 +329,13 @@ function void uvma_isacov_mon_c::write_rvfi_instr(uvma_rvfi_instr_seq_item_c#(IL
endcase
end

mon_trn.instr.set_valid_flags();
if (cfg.decoder == SPIKE) begin
mon_trn.instr.set_valid_flags();
end else begin // if ISA_DECODER
mon_trn.instr.rd_valid = instr_asm.rd.valid;
mon_trn.instr.rs1_valid = instr_asm.rs1.valid;
mon_trn.instr.rs2_valid = instr_asm.rs2.valid;
end

// Set enumerations for register values as reported from RVFI
if (mon_trn.instr.rs1_valid) begin
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