o1vm/riscv32: implement div_signed

[dannywillems]

No description provided.

[svv232]

Suggested change

	let x: u32 = (*x).try_into().unwrap();
	let y: u32 = (*y).try_into().unwrap();
	let res = ((x as i32) / (y as i32)) as u32;
	let res = res as u64;
	self.write_column(position, res);
	let x: i32 = (*x).try_into().unwrap();
	let y: i32 = (*y).try_into().unwrap();
	let res = x / y;
	let res = res as u64;
	self.write_column(position, res);

[codecov]

Codecov Report

Attention: Patch coverage is 0% with 21 lines in your changes missing coverage. Please review.

Project coverage is 71.96%. Comparing base (9a8de63) to head (250bce5).

Files with missing lines	Patch %	Lines
o1vm/src/interpreters/riscv32im/witness.rs	0.00%	13 Missing ⚠️
o1vm/src/interpreters/riscv32im/constraints.rs	0.00%	8 Missing ⚠️

Additional details and impacted files

@@                        Coverage Diff                         @@
##           dw/o1vm/riscv-remove-mul-hi-lo    #2799      +/-   ##
==================================================================
- Coverage                           71.98%   71.96%   -0.03%     
==================================================================
  Files                                 255      255              
  Lines                               59967    59988      +21     
==================================================================
- Hits                                43170    43168       -2     
- Misses                              16797    16820      +23     

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