Changed rggen generation to verilog due to verilator 4.106 support

Signed-off-by: Anderson Ignacio <[email protected]>

.gitmodules

@@ -1,3 +1,6 @@
 [submodule "rggen-sv-rtl"]
 	path = rggen-sv-rtl
 	url = https://github.com/rggen/rggen-sv-rtl
+[submodule "rggen-verilog-rtl"]
+	path = rggen-verilog-rtl
+	url = https://github.com/rggen/rggen-verilog-rtl.git

Dockerfile

@@ -6,6 +6,7 @@ RUN ln -snf /usr/share/zoneinfo/$TZ /etc/localtime && echo $TZ > /etc/timezone
 RUN apt-get update && apt-get upgrade -y
 RUN apt-get install git file make ruby -y
 RUN gem install rggen
+RUN gem install rggen-verilog
 
 WORKDIR /
 RUN git clone https://github.com/rggen/rggen-sv-rtl.git

Makefile

@@ -2,20 +2,13 @@ RUN_CMD	:=	docker run --rm --name axi_dma	\
 						-v $(abspath .):/axi_dma -w			\
 						/axi_dma aignacio/axi_dma
 
-###########################################################
-#SIM ?= verilator
-#TOPLEVEL_LANG ?= verilog
-#VERILOG_SOURCES += dff.sv
-#TOPLEVEL = dff
-#MODULE = run_test
-#include $(shell cocotb-config --makefiles)/Makefile.sim
-###########################################################
+.PHONY: run_test csr_dma.sv clean
 
-run_test:
+run_test: csr_out
 	$(RUN_CMD) tox
 
-gen_csr:
-	$(RUN_CMD) rggen -c config.yml -o csr_out csr_dma.xlsx
+csr_out:
+	$(RUN_CMD) rggen --plugin rggen-verilog -c config.yml -o csr_out csr_dma.xlsx
 
 clean:
 	@rm -rf run_dir