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Merge pull request #5 from sajjadahmed677/main
RTL updated to APR V0.10
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// Copyright lowRISC contributors. | ||
// Licensed under the Apache License, Version 2.0, see LICENSE for details. | ||
// SPDX-License-Identifier: Apache-2.0 | ||
// | ||
// tl_main package generated by `tlgen.py` tool | ||
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package tl_main_pkg; | ||
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localparam logic [31:0] ADDR_SPACE_ICCM = 32'h 20000000; | ||
localparam logic [31:0] ADDR_SPACE_DCCM = 32'h 10000000; | ||
localparam logic [31:0] ADDR_SPACE_TIMER0 = 32'h 40000000; | ||
localparam logic [31:0] ADDR_SPACE_UART0 = 32'h 40060000; | ||
localparam logic [31:0] ADDR_SPACE_SPI0 = 32'h 40080000; | ||
localparam logic [31:0] ADDR_SPACE_PWM = 32'h 400b0000; | ||
localparam logic [31:0] ADDR_SPACE_GPIO = 32'h 400c0000; | ||
localparam logic [31:0] ADDR_SPACE_PLIC = 32'h 40050000; | ||
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localparam logic [31:0] ADDR_MASK_ICCM = 32'h 0000ffff; | ||
localparam logic [31:0] ADDR_MASK_DCCM = 32'h 0000ffff; | ||
localparam logic [31:0] ADDR_MASK_TIMER0 = 32'h 0000ffff; | ||
localparam logic [31:0] ADDR_MASK_UART0 = 32'h 0000ffff; | ||
localparam logic [31:0] ADDR_MASK_SPI0 = 32'h 0000ffff; | ||
localparam logic [31:0] ADDR_MASK_PWM = 32'h 0000ffff; | ||
localparam logic [31:0] ADDR_MASK_GPIO = 32'h 0000ffff; | ||
localparam logic [31:0] ADDR_MASK_PLIC = 32'h 0000ffff; | ||
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localparam int N_HOST = 2; | ||
localparam int N_DEVICE = 8; | ||
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typedef enum int { | ||
TlIccm = 0, | ||
TlDccm = 1, | ||
TlTimer0 = 2, | ||
TlUart0 = 3, | ||
TlSpi0 = 4, | ||
TlPwm = 5, | ||
TlGpio = 6, | ||
TlPlic = 7 | ||
} tl_device_e; | ||
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typedef enum int { | ||
TlBrqif = 0, | ||
TlBrqlsu = 1 | ||
} tl_host_e; | ||
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endpackage |
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// main XBAR | ||
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module tl_xbar_main ( | ||
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input logic clk_i, | ||
input logic rst_ni, | ||
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// Host interfaces | ||
input tlul_pkg::tl_h2d_t tl_brqif_i, | ||
output tlul_pkg::tl_d2h_t tl_brqif_o, | ||
input tlul_pkg::tl_h2d_t tl_brqlsu_i, | ||
output tlul_pkg::tl_d2h_t tl_brqlsu_o, | ||
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// Device interfaces | ||
output tlul_pkg::tl_h2d_t tl_iccm_o, | ||
input tlul_pkg::tl_d2h_t tl_iccm_i, | ||
output tlul_pkg::tl_h2d_t tl_dccm_o, | ||
input tlul_pkg::tl_d2h_t tl_dccm_i, | ||
output tlul_pkg::tl_h2d_t tl_timer0_o, | ||
input tlul_pkg::tl_d2h_t tl_timer0_i, | ||
output tlul_pkg::tl_h2d_t tl_uart_o, | ||
input tlul_pkg::tl_d2h_t tl_uart_i, | ||
output tlul_pkg::tl_h2d_t tl_spi_o, | ||
input tlul_pkg::tl_d2h_t tl_spi_i, | ||
output tlul_pkg::tl_h2d_t tl_pwm_o, | ||
input tlul_pkg::tl_d2h_t tl_pwm_i, | ||
output tlul_pkg::tl_h2d_t tl_gpio_o, | ||
input tlul_pkg::tl_d2h_t tl_gpio_i, | ||
output tlul_pkg::tl_h2d_t tl_plic_o, | ||
input tlul_pkg::tl_d2h_t tl_plic_i | ||
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); | ||
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import tlul_pkg::*; | ||
import tl_main_pkg::*; | ||
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// host LSU | ||
tlul_pkg::tl_h2d_t brqlsu_to_s1n; | ||
tlul_pkg::tl_d2h_t s1n_to_brqlsu; | ||
logic [2:0] device_sel; | ||
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tlul_pkg::tl_h2d_t h_dv_o[7]; | ||
tlul_pkg::tl_d2h_t h_dv_i[7]; | ||
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assign brqlsu_to_s1n = tl_brqlsu_i; | ||
assign tl_brqlsu_o = s1n_to_brqlsu; | ||
// Dveice connections | ||
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assign tl_iccm_o = tl_brqif_i; | ||
assign tl_brqif_o = tl_iccm_i; | ||
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assign tl_dccm_o = h_dv_o[0]; | ||
assign h_dv_i[0] = tl_dccm_i; | ||
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assign tl_timer0_o = h_dv_o[1]; | ||
assign h_dv_i[1] = tl_timer0_i; | ||
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assign tl_uart_o = h_dv_o[2]; | ||
assign h_dv_i[2] = tl_uart_i; | ||
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assign tl_spi_o = h_dv_o[3]; | ||
assign h_dv_i[3] = tl_spi_i; | ||
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assign tl_pwm_o = h_dv_o[4]; | ||
assign h_dv_i[4] = tl_pwm_i; | ||
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assign tl_gpio_o = h_dv_o[5]; | ||
assign h_dv_i[5] = tl_gpio_i; | ||
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assign tl_plic_o = h_dv_o[6]; | ||
assign h_dv_i[6] = tl_plic_i; | ||
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// host socket | ||
always_comb begin | ||
device_sel = 3'd7; | ||
if ((brqlsu_to_s1n.a_address & ~(ADDR_MASK_DCCM)) == ADDR_SPACE_DCCM) begin | ||
device_sel = 3'd0; | ||
end else if ((brqlsu_to_s1n.a_address & ~(ADDR_MASK_TIMER0)) == ADDR_SPACE_TIMER0) begin | ||
device_sel = 3'd1; | ||
end else if ((brqlsu_to_s1n.a_address & ~(ADDR_MASK_UART0)) == ADDR_SPACE_UART0) begin | ||
device_sel = 3'd2; | ||
end else if ((brqlsu_to_s1n.a_address & ~(ADDR_MASK_SPI0)) == ADDR_SPACE_SPI0) begin | ||
device_sel = 3'd3; | ||
end else if ((brqlsu_to_s1n.a_address & ~(ADDR_MASK_PWM)) == ADDR_SPACE_PWM) begin | ||
device_sel = 3'd4; | ||
end else if ((brqlsu_to_s1n.a_address & ~(ADDR_MASK_GPIO)) == ADDR_SPACE_GPIO) begin | ||
device_sel = 3'd5; | ||
end else if ((brqlsu_to_s1n.a_address & ~(ADDR_MASK_PLIC)) == ADDR_SPACE_PLIC) begin | ||
device_sel = 3'd6; | ||
end | ||
end | ||
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// host 2 socket | ||
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tlul_socket_1n #( | ||
.HReqDepth (4'h0), | ||
.HRspDepth (4'h0), | ||
.DReqDepth (36'h0), | ||
.DRspDepth (36'h0), | ||
.N (7) | ||
) host_lsu ( | ||
.clk_i (clk_i), | ||
.rst_ni (rst_ni), | ||
.tl_h_i (brqlsu_to_s1n), | ||
.tl_h_o (s1n_to_brqlsu), | ||
.tl_d_o (h_dv_o), | ||
.tl_d_i (h_dv_i), | ||
.dev_select_i (device_sel) | ||
); | ||
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endmodule |
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