Fix aon_timer and power manager, update ibexdemo

.github/workflows/build_test.yaml

@@ -36,6 +36,7 @@ jobs:
           strip build-clang/qemu-system-riscv32
       - name: Create minimal test binaries
         run: |
+          scripts/opentitan/swexit.py -t ibexdemo -o build-clang/exit_id.bin
           scripts/opentitan/swexit.py -t earlgrey -o build-clang/exit_eg.bin
           scripts/opentitan/swexit.py -t darjeeling -o build-clang/exit_dj.bin
       - name: Upload QEMU binary artifacts
@@ -118,8 +119,13 @@ jobs:
       - name: Check machine availability
         run: |
           chmod +x ./qemu-system-riscv32 &&
+          ./qemu-system-riscv32 -M help | grep ibexdemo &&
           ./qemu-system-riscv32 -M help | grep ot-earlgrey &&
           ./qemu-system-riscv32 -M help | grep ot-darjeeling
+      - name: Check IbexDemo VM execution
+        run: |
+          timeout -s KILL 4 ./qemu-system-riscv32 -M ibexdemo -nographic \
+            -device loader,addr=0x100080,file=exit_id.bin -d in_asm,int
       - name: Check EarlGrey VM execution
         run: |
           timeout -s KILL 4 ./qemu-system-riscv32 -M ot-earlgrey,no_epmp_cfg=true -nographic \

.gitlab-ci.d/opentitan/build.yml

@@ -26,6 +26,7 @@ build-clang:
     - strip qemu-system-riscv32 qemu-img
     - QEMU_DIR="$(cd .. && pwd -P)"; cat compile_commands.json |
         sed -E 's,'"$QEMU_DIR"',@QEMU_DIR@,g' > compile_commands.json.tpl
+    - ../scripts/opentitan/swexit.py -t ibexdemo -o exit_id.bin
     - ../scripts/opentitan/swexit.py -t earlgrey -o exit_eg.bin
     - ../scripts/opentitan/swexit.py -t darjeeling -o exit_dj.bin
   artifacts:

.gitlab-ci.d/opentitan/ot-smoke.yml

@@ -4,8 +4,11 @@ smoke-tests-ot:
   stage: test
   needs: ["build-clang"]
   script:
+    - build/qemu-system-riscv32 -M help | grep ibexdemo
     - build/qemu-system-riscv32 -M help | grep ot-earlgrey
     - build/qemu-system-riscv32 -M help | grep ot-darjeeling
+    - timeout -s KILL 4 build/qemu-system-riscv32 -M ibexdemo -nographic
+        -device loader,addr=0x100080,file=build/exit_id.bin -d in_asm,int
     - timeout -s KILL 4 build/qemu-system-riscv32 -M ot-earlgrey,no_epmp_cfg=true -nographic
         -object ot-rom-img,id=rom,file=build/exit_eg.bin,digest=fake,addr=0x8080 -d in_asm,int
     - timeout -s KILL 4 build/qemu-system-riscv32 -M ot-darjeeling,no_epmp_cfg=true -nographic

.gitlab-ci.d/opentitan/qemu-ot.yml

@@ -1,5 +1,5 @@
 variables:
-  BAREMETAL_REF: "240531-1"
+  BAREMETAL_REF: "240604-2"
   QEMU_BUILD_OPTS: ""
 
 include:

hw/ibexdemo/ibexdemo_simctrl.c

@@ -31,6 +31,7 @@
 #include "hw/qdev-properties.h"
 #include "hw/registerfields.h"
 #include "hw/sysbus.h"
+#include "sysemu/runstate.h"
 #include "trace.h"
 
 /* clang-format off */
@@ -73,8 +74,11 @@ static void ibexdemo_simctrl_write(void *opaque, hwaddr addr, uint64_t val64,
         putc((int)(uint8_t)val64, stderr);
         break;
     case R_CTRL:
-        /* would be nicer to receive a value with the code for exiting... */
-        exit(100);
+        if (val64 & 1u) {
+            /* as a QEMU extension, bits [7:1] are used as exit code */
+            qemu_system_shutdown_request_with_code(
+                SHUTDOWN_CAUSE_GUEST_SHUTDOWN, (val64 >> 1u) & 0x7fu);
+        }
         break;
     default:
         qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%" HWADDR_PRIx "\n",

hw/opentitan/ot_aon_timer.c

@@ -256,21 +256,26 @@ static void ot_aon_timer_rearm_wdog(OtAonTimerState *s, bool reset_origin)
     uint32_t count = ot_aon_timer_get_wdog_count(s, now);
     uint32_t bark_threshold = s->regs[R_WDOG_BARK_THOLD];
     uint32_t bite_threshold = s->regs[R_WDOG_BITE_THOLD];
-    uint32_t threshold = 0;
+    uint32_t threshold;
+    bool pending;
 
     if (count >= bark_threshold) {
         s->regs[R_INTR_STATE] |= INTR_WDOG_TIMER_BARK_MASK;
+        threshold = UINT32_MAX;
+        pending = false;
     } else {
         threshold = bark_threshold;
+        pending = true;
     }
 
     if (count >= bite_threshold) {
         s->wdog_bite = true;
-    } else if (bite_threshold < threshold) {
-        threshold = bite_threshold;
+    } else {
+        threshold = MIN(threshold, bite_threshold);
+        pending = true;
     }
 
-    if (count >= threshold) {
+    if (!pending) {
         timer_del(s->wdog_timer);
     } else {
         int64_t delta = ot_aon_timer_ticks_to_ns(s, 0u, threshold - count);

hw/opentitan/ot_pwrmgr.c

@@ -82,8 +82,6 @@ REG32(WAKE_STATUS, 0x24u)
 REG32(RESET_EN_REGWEN, 0x28u)
     FIELD(RESET_EN_REGWEN, EN, 0u, 1u)
 REG32(RESET_EN, 0x2cu)
-    SHARED_FIELD(RESET_CHANNEL_0, 0u, 1u)
-    SHARED_FIELD(RESET_CHANNEL_1, 1u, 1u)
 REG32(RESET_STATUS, 0x30u)
 REG32(ESCALATE_RESET_STATUS, 0x34u)
     FIELD(ESCALATE_RESET_STATUS, VAL, 0u, 1u)
@@ -106,15 +104,13 @@ REG32(FAULT_STATUS, 0x40u)
 #define WAKEUP_MASK \
     (WAKEUP_CHANNEL_0_MASK | WAKEUP_CHANNEL_1_MASK | WAKEUP_CHANNEL_2_MASK | \
      WAKEUP_CHANNEL_3_MASK | WAKEUP_CHANNEL_4_MASK | WAKEUP_CHANNEL_5_MASK)
-#define RESET_MASK (RESET_CHANNEL_0_MASK | RESET_CHANNEL_1_MASK)
 #define WAKE_INFO_MASK \
     (R_WAKE_INFO_REASONS_MASK | R_WAKE_INFO_FALL_THROUGH_MASK | \
      R_WAKE_INFO_ABORT_MASK)
 
 #define CDC_SYNC_PULSE_DURATION_NS 100000u /* 100us */
 
 #define PWRMGR_WAKEUP_MAX 6u
-#define PWRMGR_RESET_MAX  3u
 
 /* special exit error code to report escalation panic */
 #define EXIT_ESCALATION_PANIC 39
@@ -123,8 +119,7 @@ REG32(FAULT_STATUS, 0x40u)
 #define NUM_SW_RST_REQ 1u
 #define HW_RESET_WIDTH \
     (PARAM_NUM_RST_REQS + PARAM_NUM_INT_RST_REQS + PARAM_NUM_DEBUG_RST_REQS)
-#define TOTAL_RESET_WIDTH (HW_RESET_WIDTH + NUM_SW_RST_REQ)
-#define RESET_SW_REQ_IDX  (TOTAL_RESET_WIDTH - 1u)
+#define RESET_SW_REQ_IDX (HW_RESET_WIDTH)
 
 #define R32_OFF(_r_) ((_r_) / sizeof(uint32_t))
 
@@ -336,16 +331,14 @@ static const OtPwrMgrConfig PWRMGR_CONFIG[OT_PWMGR_VERSION_COUNT] = {
     },
 };
 
-static int PWRMGR_RESET_DISPATCH[OT_PWMGR_VERSION_COUNT][PWRMGR_RESET_MAX] = {
+static int PWRMGR_RESET_DISPATCH[OT_PWMGR_VERSION_COUNT][PARAM_NUM_RST_REQS] = {
     [OT_PWMGR_VERSION_EG] = {
         [0] = OT_RSTMGR_RESET_SYSCTRL,
         [1] = OT_RSTMGR_RESET_AON_TIMER,
-        [2] = -1
     },
     [OT_PWMGR_VERSION_DJ] = {
         [0] = OT_RSTMGR_RESET_AON_TIMER,
         [1] = OT_RSTMGR_RESET_SOC_PROXY,
-        [2] = -1,
     },
 };
 
@@ -369,11 +362,10 @@ PWRMGR_WAKEUP_NAMES[OT_PWMGR_VERSION_COUNT][PWRMGR_WAKEUP_MAX] = {
     },
 };
 
-static const char *PWRMGR_RST_NAMES[OT_PWMGR_VERSION_COUNT][PWRMGR_RESET_MAX] = {
+static const char *PWRMGR_RST_NAMES[OT_PWMGR_VERSION_COUNT][PARAM_NUM_RST_REQS] = {
     [OT_PWMGR_VERSION_EG] = {
         [0] = "SYSRST",
         [1] = "AON_TIMER",
-        [2] = "SENSOR",
     },
     [OT_PWMGR_VERSION_DJ] = {
         [0] = "AON_TIMER",
@@ -533,7 +525,7 @@ static void ot_pwrmgr_sw_rst_req(void *opaque, int irq, int level)
     unsigned src = (unsigned)irq;
     g_assert(src < NUM_SW_RST_REQ);
 
-    uint32_t rstbit = 1u << (NUM_SW_RST_REQ + src);
+    uint32_t rstbit = 1u << (RESET_SW_REQ_IDX + src);
 
     if (level) {
         trace_ot_pwrmgr_rst_req(s->ot_id, "SW", src);
@@ -754,7 +746,6 @@ static uint64_t ot_pwrmgr_regs_read(void *opaque, hwaddr addr, unsigned size)
     case R_WAKE_STATUS:
     case R_RESET_EN_REGWEN:
     case R_RESET_EN:
-    case R_RESET_STATUS:
     case R_ESCALATE_RESET_STATUS:
     case R_WAKE_INFO_CAPTURE_DIS:
     case R_WAKE_INFO:
@@ -768,6 +759,9 @@ static uint64_t ot_pwrmgr_regs_read(void *opaque, hwaddr addr, unsigned size)
                       __func__, s->ot_id, addr, REG_NAME(reg));
         val32 = 0;
         break;
+    case R_RESET_STATUS:
+        val32 = s->regs[reg] & PWRMGR_CONFIG[s->version].reset_mask;
+        break;
     default:
         qemu_log_mask(LOG_GUEST_ERROR,
                       "%s: %s: Bad offset 0x%" HWADDR_PRIx "\n", __func__,
@@ -848,7 +842,7 @@ static void ot_pwrmgr_regs_write(void *opaque, hwaddr addr, uint64_t val64,
         break;
     case R_RESET_EN:
         if (s->regs[R_RESET_EN_REGWEN] & R_RESET_EN_REGWEN_EN_MASK) {
-            val32 &= RESET_MASK;
+            val32 &= PWRMGR_CONFIG[s->version].reset_mask;
             s->regs[reg] = val32;
         } else {
             qemu_log_mask(LOG_GUEST_ERROR, "%s: %s: %s protected w/ REGWEN\n",
@@ -906,6 +900,12 @@ static void ot_pwrmgr_reset_enter(Object *obj, ResetType type)
 
     g_assert(s->version < OT_PWMGR_VERSION_COUNT);
 
+    /* sanity checks for platform reset count and mask */
+    g_assert(PWRMGR_CONFIG[s->version].reset_count <= PARAM_NUM_RST_REQS);
+    g_assert(ctpop32(PWRMGR_CONFIG[s->version].reset_mask + 1u) == 1);
+    g_assert(PWRMGR_CONFIG[s->version].reset_mask <
+             (1u << PWRMGR_CONFIG[s->version].reset_count));
+
     if (!s->ot_id) {
         s->ot_id =
             g_strdup(object_get_canonical_path_component(OBJECT(s)->parent));
@@ -997,7 +997,7 @@ static void ot_pwrmgr_init(Object *obj)
     qdev_init_gpio_in_named(DEVICE(obj), &ot_pwrmgr_wkup, OT_PWRMGR_WKUP,
                             PWRMGR_WAKEUP_MAX);
     qdev_init_gpio_in_named(DEVICE(obj), &ot_pwrmgr_rst_req, OT_PWRMGR_RST,
-                            PWRMGR_RESET_MAX);
+                            PARAM_NUM_RST_REQS);
     qdev_init_gpio_in_named(DEVICE(obj), &ot_pwrmgr_sw_rst_req,
                             OT_PWRMGR_SW_RST, NUM_SW_RST_REQ);
     qdev_init_gpio_in_named(DEVICE(obj), &ot_pwrmgr_pwr_lc_rsp,

hw/riscv/ibex_common.c

@@ -242,9 +242,9 @@ void ibex_map_devices_mask(DeviceState **devices, MemoryRegion **mrs,
                 (SysBusDevice *)object_dynamic_cast(OBJECT(dev),
                                                     TYPE_SYS_BUS_DEVICE);
             if (busdev) {
-                const MemMapEntry *memmap = def->memmap;
+                const IbexMemMapEntry *memmap = def->memmap;
                 unsigned mem = 0;
-                while (memmap->size) {
+                while (!IBEX_MEMMAP_IS_LAST(memmap)) {
                     unsigned region = IBEX_MEMMAP_GET_REGIDX(memmap->base);
                     if (region_mask & (1u << region)) {
                         MemoryRegion *mr = mrs[region];
@@ -278,10 +278,10 @@ void ibex_map_devices_ext_mask(DeviceState *dev, MemoryRegion **mrs,
         sdev = OBJECT_CHECK(SysBusDevice, child, TYPE_SYS_BUS_DEVICE);
         g_free(name);
 
-        const MemMapEntry *memmap = def->memmap;
+        const IbexMemMapEntry *memmap = def->memmap;
         unsigned mem = 0;
-        while (memmap->size) {
-            if (!SKIP_MEMMAP(memmap)) {
+        while (!IBEX_MEMMAP_IS_LAST(memmap)) {
+            if (!IBEX_MEMMAP_IGNORE(memmap)) {
                 unsigned region = IBEX_MEMMAP_GET_REGIDX(memmap->base);
                 if (region_mask & (1u << region)) {
                     MemoryRegion *mr = mrs[region];
@@ -636,8 +636,6 @@ void ibex_unimp_configure(DeviceState *dev, const IbexDeviceDef *def,
         qdev_prop_set_string(dev, "name", def->name);
     }
     g_assert(def->memmap != NULL);
-    g_assert(def->memmap->size != 0);
-    qdev_prop_set_uint64(dev, "size", def->memmap->size);
 }
 
 uint32_t ibex_load_kernel(CPUState *cpu)

hw/riscv/ibexdemo.c

@@ -63,9 +63,6 @@ static void ibexdemo_soc_uart_configure(
 /* Constants */
 /* ------------------------------------------------------------------------ */
 
-static const MemMapEntry ibexdemo_ram = { .base = 0x00100000u,
-                                          .size = 0x10000u };
-
 static const uint32_t IBEXDEMO_BOOT[] = {
     /* Exception vectors */
     0x0840006fu, 0x0800006fu, 0x07c0006fu, 0x0780006fu, 0x0740006fu,
@@ -111,7 +108,12 @@ enum IbexDemoBoardDevice {
  */
 #define IBEXDEMO_TAP_IDCODE IBEX_JTAG_IDCODE(256, 1, 0)
 
-#define PULP_DM_BASE 0x00010000u
+#define PULP_DM_BASE   0x00010000u
+#define SRAM_MAIN_BASE 0x100000u
+#define SRAM_MAIN_SIZE 0x10000u
+
+#define NUM_PWM_MODULES 12u
+#define PWM_SIZE        (NUM_PWM_MODULES * 8u)
 
 #define IBEXDEMO_DM_CONNECTION(_dst_dev_, _num_) \
     { \
@@ -186,7 +188,7 @@ static const IbexDeviceDef ibexdemo_soc_devices[] = {
     [IBEXDEMO_SOC_DEV_RV_DM] = {
         .type = TYPE_PULP_RV_DM,
         .memmap = MEMMAPENTRIES(
-            { .base = 0x00000000u, .size = 0x1000u }
+            { .base = 0x00000000u }
         ),
         .gpio = IBEXGPIOCONNDEFS(
             IBEXDEMO_DM_CONNECTION(IBEXDEMO_SOC_DEV_DM, 0),
@@ -198,21 +200,21 @@ static const IbexDeviceDef ibexdemo_soc_devices[] = {
     [IBEXDEMO_SOC_DEV_SIM_CTRL] = {
         .type = TYPE_IBEXDEMO_SIMCTRL,
         .memmap = MEMMAPENTRIES(
-            { .base = 0x00020000u, .size = 0x0400u }
+            { .base = 0x00020000u }
         ),
     },
     [IBEXDEMO_SOC_DEV_GPIO] = {
         .type = TYPE_IBEXDEMO_GPIO,
         .cfg = &ibexdemo_soc_gpio_configure,
         .memmap = MEMMAPENTRIES(
-            { .base = 0x80000000u, .size = 0x1000u }
+            { .base = 0x80000000u }
         ),
     },
     [IBEXDEMO_SOC_DEV_UART] = {
         .type = TYPE_IBEXDEMO_UART,
         .cfg = &ibexdemo_soc_uart_configure,
         .memmap = MEMMAPENTRIES(
-            { .base = 0x80001000u, .size = 0x1000u }
+            { .base = 0x80001000u }
         ),
         .gpio = IBEXGPIOCONNDEFS(
             IBEX_GPIO_SYSBUS_IRQ(0, IBEXDEMO_SOC_DEV_HART, 16)
@@ -221,7 +223,7 @@ static const IbexDeviceDef ibexdemo_soc_devices[] = {
     [IBEXDEMO_SOC_DEV_TIMER] = {
         .type = TYPE_IBEXDEMO_TIMER,
         .memmap = MEMMAPENTRIES(
-            { .base = 0x80002000u, .size = 0x1000u }
+            { .base = 0x80002000u }
         ),
         .gpio = IBEXGPIOCONNDEFS(
             IBEX_GPIO_SYSBUS_IRQ(0, IBEXDEMO_SOC_DEV_HART, IRQ_M_TIMER)
@@ -232,13 +234,16 @@ static const IbexDeviceDef ibexdemo_soc_devices[] = {
         .name = "ibexdemo-pwm",
         .cfg = &ibex_unimp_configure,
         .memmap = MEMMAPENTRIES(
-            { .base = 0x80003000u, .size = 0x1000u }
+            { .base = 0x80003000u }
+        ),
+        .prop = IBEXDEVICEPROPDEFS(
+            IBEX_DEV_UINT_PROP("size", PWM_SIZE)
         ),
     },
     [IBEXDEMO_SOC_DEV_SPI] = {
         .type = TYPE_IBEXDEMO_SPI,
         .memmap = MEMMAPENTRIES(
-            { .base = 0x80004000u, .size = 0x0400u }
+            { .base = 0x80004000u }
         ),
     },
     /* clang-format on */
@@ -359,7 +364,7 @@ static void ibexdemo_soc_realize(DeviceState *dev, Error **errp)
 
     MachineState *ms = MACHINE(qdev_get_machine());
     MemoryRegion *sys_mem = get_system_memory();
-    memory_region_add_subregion(sys_mem, ibexdemo_ram.base, ms->ram);
+    memory_region_add_subregion(sys_mem, SRAM_MAIN_BASE, ms->ram);
 
     ibex_link_devices(s->devices, ibexdemo_soc_devices,
                       ARRAY_SIZE(ibexdemo_soc_devices));
@@ -507,7 +512,7 @@ static void ibexdemo_machine_class_init(ObjectClass *oc, void *data)
     mc->max_cpus = 1u;
     mc->default_cpu_type = ibexdemo_soc_devices[IBEXDEMO_SOC_DEV_HART].type;
     mc->default_ram_id = "ibexdemo.ram";
-    mc->default_ram_size = ibexdemo_ram.size;
+    mc->default_ram_size = SRAM_MAIN_SIZE;
 }
 
 static const TypeInfo ibexdemo_machine_type_info = {