Add A1 bitstream and pentest firmware

This commit adds the OpenTitan Earl Grey A1 FPGA bitstream and the pentest binary to the repository. The previous binaries for the Earl Grey Z1 version are retained with the filename suffix z1. The FPGA bitstream was generated from commit lowRISC/opentitan@282d863 and created with the command: `/bazelisk.sh build //hw/bitstream/vivado:fpga_cw310_test_rom` The pentest binary was generated from commit lowRISC/opentitan@b2cee40 and created with the command: `./bazelisk.sh build //sw/device/tests/penetrationtests/firmware:firmware_fpga_cw310_test_rom` Signed-off-by: Andrea Caforio <[email protected]> Co-authored-by: Pascal Nasahl <[email protected]>
lowRISC · Sep 18, 2024 · 89bd851 · 89bd851
1 parent 173bb0c
commit 89bd851
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Showing 60 changed files with 102 additions and 96 deletions.
diff --git a/capture/configs/aes_sca_cw310.yaml b/capture/configs/aes_sca_cw310.yaml
@@ -1,9 +1,9 @@
 target:
   target_type: cw310
-  fpga_bitstream: "../objs/lowrisc_systems_chip_earlgrey_cw310_0.1.bit"
+  fpga_bitstream: "../objs/lowrisc_systems_chip_earlgrey_cw310_0.1_a1.bit"
   force_program_bitstream: False
   fw_bin: "../objs/aes_serial_fpga_cw310.bin"
-  # fw_bin: "../objs/sca_ujson_fpga_cw310.bin"
+  # fw_bin: "../objs/pentest_ujson_fpga_cw310_a1.bin"
   # target_clk_mult is a hardcoded value in the bitstream. Do not change.
   target_clk_mult: 0.24
   target_freq: 24000000

diff --git a/capture/configs/hmac_sca_cw310.yaml b/capture/configs/hmac_sca_cw310.yaml
@@ -1,6 +1,6 @@
 target:
   target_type: cw310
-  fpga_bitstream: "../objs/lowrisc_systems_chip_earlgrey_cw310_0.1.bit"
+  fpga_bitstream: "../objs/lowrisc_systems_chip_earlgrey_cw310_0.1_a1.bit"
   force_program_bitstream: False
   fw_bin: "../objs/sca_ujson_chip_signed.img"
   target_clk_mult: 0.24

diff --git a/capture/configs/ibex_sca_cw310.yaml b/capture/configs/ibex_sca_cw310.yaml
@@ -1,8 +1,8 @@
 target:
   target_type: cw310
-  fpga_bitstream: "../objs/lowrisc_systems_chip_earlgrey_cw310_0.1.bit"
+  fpga_bitstream: "../objs/lowrisc_systems_chip_earlgrey_cw310_0.1_a1.bit"
   force_program_bitstream: False
-  fw_bin: ../objs/sca_ujson_fpga_cw310.bin
+  fw_bin: ../objs/pentest_ujson_fpga_cw310_a1.bin
   target_clk_mult: 0.24
   target_freq: 24000000
   baudrate: 115200

diff --git a/capture/configs/kmac_sca_cw310.yaml b/capture/configs/kmac_sca_cw310.yaml
@@ -3,7 +3,7 @@ target:
   fpga_bitstream: ../objs/lowrisc_systems_chip_earlgrey_cw310_0.1_kmac_dom.bit
   force_program_bitstream: False
   fw_bin: ../objs/kmac_serial_fpga_cw310.bin
-  # fw_bin: "../objs/sca_ujson_fpga_cw310.bin"
+  # fw_bin: "../objs/pentest_ujson_fpga_cw310_a1.bin"
   # target_clk_mult is a hardcoded value in the bitstream. Do not change.
   target_clk_mult: 0.24
   target_freq: 24000000

diff --git a/capture/configs/otbn_vertical_keygen_sca_cw310.yaml b/capture/configs/otbn_vertical_keygen_sca_cw310.yaml
@@ -1,6 +1,6 @@
 target:
   target_type: cw310
-  fpga_bitstream: "../objs/lowrisc_systems_chip_earlgrey_cw310_0.1.bit"
+  fpga_bitstream: "../objs/lowrisc_systems_chip_earlgrey_cw310_0.1_a1.bit"
   force_program_bitstream: True
   fw_bin: "../objs/otbn_vertical_serial_fpga_cw310.bin"
   # target_clk_mult is a hardcoded value in the bitstream. Do not change.

diff --git a/capture/configs/otbn_vertical_modinv_sca_cw310.yaml b/capture/configs/otbn_vertical_modinv_sca_cw310.yaml
@@ -1,6 +1,6 @@
 target:
   target_type: cw310
-  fpga_bitstream: "../objs/lowrisc_systems_chip_earlgrey_cw310_0.1.bit"
+  fpga_bitstream: "../objs/lowrisc_systems_chip_earlgrey_cw310_0.1_a1.bit"
   force_program_bitstream: True
   fw_bin: "../objs/otbn_vertical_serial_fpga_cw310.bin"
   # target_clk_mult is a hardcoded value in the bitstream. Do not change.

diff --git a/capture/configs/sha3_sca_cw310.yaml b/capture/configs/sha3_sca_cw310.yaml
@@ -3,7 +3,7 @@ target:
   fpga_bitstream: ../objs/lowrisc_systems_chip_earlgrey_cw310_0.1_kmac_dom.bit
   force_program_bitstream: False
   fw_bin: ../objs/sha3_serial_fpga_cw310.bin
-  # fw_bin: ../objs/sca_ujson_fpga_cw310.bin
+  # fw_bin: ../objs/pentest_ujson_fpga_cw310_a1.bin
   target_clk_mult: 0.24
   target_freq: 24000000
   baudrate: 115200

diff --git a/capture/configs/sha3_sca_cw310_masks_off.yaml b/capture/configs/sha3_sca_cw310_masks_off.yaml
@@ -3,7 +3,7 @@ target:
   fpga_bitstream: ../objs/lowrisc_systems_chip_earlgrey_cw310_0.1_kmac_dom.bit
   force_program_bitstream: False
   fw_bin: ../objs/sha3_serial_fpga_cw310.bin
-  # fw_bin: ../objs/sca_ujson_fpga_cw310.bin
+  # fw_bin: ../objs/pentest_ujson_fpga_cw310_a1.bin
   target_clk_mult: 0.24
   target_freq: 24000000
   baudrate: 115200

diff --git a/ci/cfg/ci_aes_sca_fvsr_cw310_simpleserial.yaml b/ci/cfg/ci_aes_sca_fvsr_cw310_simpleserial.yaml
@@ -1,6 +1,6 @@
 target:
   target_type: cw310
-  fpga_bitstream: "../objs/lowrisc_systems_chip_earlgrey_cw310_0.1.bit"
+  fpga_bitstream: "../objs/lowrisc_systems_chip_earlgrey_cw310_0.1_z1.bit"
   force_program_bitstream: True
   fw_bin: "../objs/aes_serial_fpga_cw310.bin"
   # target_clk_mult is a hardcoded value in the bitstream. Do not change.

diff --git a/ci/cfg/ci_aes_sca_fvsr_cw310_ujson.yaml b/ci/cfg/ci_aes_sca_fvsr_cw310_ujson.yaml
@@ -1,8 +1,8 @@
 target:
   target_type: cw310
-  fpga_bitstream: "../objs/lowrisc_systems_chip_earlgrey_cw310_0.1.bit"
+  fpga_bitstream: "../objs/lowrisc_systems_chip_earlgrey_cw310_0.1_a1.bit"
   force_program_bitstream: True
-  fw_bin: "../objs/sca_ujson_fpga_cw310.bin"
+  fw_bin: "../objs/pentest_ujson_fpga_cw310_a1.bin"
   # target_clk_mult is a hardcoded value in the bitstream. Do not change.
   target_clk_mult: 0.24
   target_freq: 24000000

diff --git a/ci/cfg/ci_aes_sca_random_cw310_simpleserial.yaml b/ci/cfg/ci_aes_sca_random_cw310_simpleserial.yaml
@@ -1,6 +1,6 @@
 target:
   target_type: cw310
-  fpga_bitstream: "../objs/lowrisc_systems_chip_earlgrey_cw310_0.1.bit"
+  fpga_bitstream: "../objs/lowrisc_systems_chip_earlgrey_cw310_0.1_z1.bit"
   force_program_bitstream: True
   fw_bin: "../objs/aes_serial_fpga_cw310.bin"
   # target_clk_mult is a hardcoded value in the bitstream. Do not change.

diff --git a/ci/cfg/ci_aes_sca_random_cw310_ujson.yaml b/ci/cfg/ci_aes_sca_random_cw310_ujson.yaml
@@ -1,8 +1,8 @@
 target:
   target_type: cw310
-  fpga_bitstream: "../objs/lowrisc_systems_chip_earlgrey_cw310_0.1.bit"
+  fpga_bitstream: "../objs/lowrisc_systems_chip_earlgrey_cw310_0.1_a1.bit"
   force_program_bitstream: True
-  fw_bin: "../objs/sca_ujson_fpga_cw310.bin"
+  fw_bin: "../objs/pentest_ujson_fpga_cw310_a1.bin"
   # target_clk_mult is a hardcoded value in the bitstream. Do not change.
   target_clk_mult: 0.24
   target_freq: 24000000

diff --git a/ci/cfg/ci_crypto_aes_vcc_dummy_cw310.yaml b/ci/cfg/ci_crypto_aes_vcc_dummy_cw310.yaml
@@ -1,8 +1,8 @@
 target:
   target_type: cw310
-  fpga_bitstream: "../objs/lowrisc_systems_chip_earlgrey_cw310_0.1.bit"
+  fpga_bitstream: "../objs/lowrisc_systems_chip_earlgrey_cw310_0.1_a1.bit"
   force_program_bitstream: False
-  fw_bin: "../objs/sca_ujson_fpga_cw310.bin"
+  fw_bin: "../objs/pentest_ujson_fpga_cw310_a1.bin"
   output_len_bytes: 16
   target_clk_mult: 0.24
   target_freq: 24000000

diff --git a/ci/cfg/ci_ibex_fi_vcc_dummy_cw310.yaml b/ci/cfg/ci_ibex_fi_vcc_dummy_cw310.yaml
@@ -1,8 +1,8 @@
 target:
   target_type: cw310
-  fpga_bitstream: "../objs/lowrisc_systems_chip_earlgrey_cw310_0.1.bit"
+  fpga_bitstream: "../objs/lowrisc_systems_chip_earlgrey_cw310_0.1_a1.bit"
   force_program_bitstream: False
-  fw_bin: "../objs/sca_ujson_fpga_cw310.bin"
+  fw_bin: "../objs/pentest_ujson_fpga_cw310_a1.bin"
   output_len_bytes: 16
   target_clk_mult: 0.24
   target_freq: 24000000

diff --git a/ci/cfg/ci_ibex_sca_cw310_ujson.yaml b/ci/cfg/ci_ibex_sca_cw310_ujson.yaml
@@ -1,8 +1,8 @@
 target:
   target_type: cw310
-  fpga_bitstream: "../objs/lowrisc_systems_chip_earlgrey_cw310_0.1.bit"
+  fpga_bitstream: "../objs/lowrisc_systems_chip_earlgrey_cw310_0.1_a1.bit"
   force_program_bitstream: False
-  fw_bin: ../objs/sca_ujson_fpga_cw310.bin
+  fw_bin: ../objs/pentest_ujson_fpga_cw310_a1.bin
   target_clk_mult: 0.24
   target_freq: 24000000
   baudrate: 115200

diff --git a/ci/cfg/ci_kmac_sca_fvsr_cw310_simpleserial.yaml b/ci/cfg/ci_kmac_sca_fvsr_cw310_simpleserial.yaml
@@ -3,7 +3,7 @@ target:
   fpga_bitstream: ../objs/lowrisc_systems_chip_earlgrey_cw310_0.1_kmac_dom.bit
   force_program_bitstream: False
   fw_bin: ../objs/kmac_serial_fpga_cw310.bin
-  # fw_bin: "../objs/sca_ujson_fpga_cw310.bin"
+  # fw_bin: "../objs/pentest_ujson_fpga_cw310_z1.bin"
   # target_clk_mult is a hardcoded value in the bitstream. Do not change.
   target_clk_mult: 0.24
   target_freq: 24000000

diff --git a/ci/cfg/ci_kmac_sca_fvsr_cw310_ujson.yaml b/ci/cfg/ci_kmac_sca_fvsr_cw310_ujson.yaml
@@ -3,7 +3,7 @@ target:
   fpga_bitstream: ../objs/lowrisc_systems_chip_earlgrey_cw310_0.1_kmac_dom.bit
   force_program_bitstream: False
   # fw_bin: ../objs/kmac_serial_fpga_cw310.bin
-  fw_bin: "../objs/sca_ujson_fpga_cw310.bin"
+  fw_bin: "../objs/pentest_ujson_fpga_cw310_a1.bin"
   # target_clk_mult is a hardcoded value in the bitstream. Do not change.
   target_clk_mult: 0.24
   target_freq: 24000000

diff --git a/ci/cfg/ci_kmac_sca_random_cw310_simpleserial.yaml b/ci/cfg/ci_kmac_sca_random_cw310_simpleserial.yaml
@@ -3,7 +3,7 @@ target:
   fpga_bitstream: ../objs/lowrisc_systems_chip_earlgrey_cw310_0.1_kmac_dom.bit
   force_program_bitstream: False
   fw_bin: ../objs/kmac_serial_fpga_cw310.bin
-  # fw_bin: "../objs/sca_ujson_fpga_cw310.bin"
+  # fw_bin: "../objs/pentest_ujson_fpga_cw310_z1.bin"
   # target_clk_mult is a hardcoded value in the bitstream. Do not change.
   target_clk_mult: 0.24
   target_freq: 24000000

diff --git a/ci/cfg/ci_kmac_sca_random_cw310_ujson.yaml b/ci/cfg/ci_kmac_sca_random_cw310_ujson.yaml
@@ -3,7 +3,7 @@ target:
   fpga_bitstream: ../objs/lowrisc_systems_chip_earlgrey_cw310_0.1_kmac_dom.bit
   force_program_bitstream: False
   # fw_bin: ../objs/kmac_serial_fpga_cw310.bin
-  fw_bin: "../objs/sca_ujson_fpga_cw310.bin"
+  fw_bin: "../objs/pentest_ujson_fpga_cw310_a1.bin"
   # target_clk_mult is a hardcoded value in the bitstream. Do not change.
   target_clk_mult: 0.24
   target_freq: 24000000

diff --git a/ci/cfg/ci_otbn_fi_vcc_dummy_cw310.yaml b/ci/cfg/ci_otbn_fi_vcc_dummy_cw310.yaml
@@ -1,8 +1,8 @@
 target:
   target_type: cw310
-  fpga_bitstream: "../objs/lowrisc_systems_chip_earlgrey_cw310_0.1.bit"
+  fpga_bitstream: "../objs/lowrisc_systems_chip_earlgrey_cw310_0.1_a1.bit"
   force_program_bitstream: True
-  fw_bin: "../objs/sca_ujson_fpga_cw310.bin"
+  fw_bin: "../objs/pentest_ujson_fpga_cw310_a1.bin"
   output_len_bytes: 16
   target_clk_mult: 0.24
   target_freq: 24000000

diff --git a/ci/cfg/ci_sha3_sca_fvsr_cw310_simpleserial.yaml b/ci/cfg/ci_sha3_sca_fvsr_cw310_simpleserial.yaml
@@ -3,7 +3,7 @@ target:
   fpga_bitstream: ../objs/lowrisc_systems_chip_earlgrey_cw310_0.1_kmac_dom.bit
   force_program_bitstream: False
   fw_bin: ../objs/sha3_serial_fpga_cw310.bin
-  # fw_bin: ../objs/sca_ujson_fpga_cw310.bin
+  # fw_bin: ../objs/pentest_ujson_fpga_cw310_z1.bin
   target_clk_mult: 0.24
   target_freq: 24000000
   baudrate: 115200

diff --git a/ci/cfg/ci_sha3_sca_fvsr_cw310_ujson.yaml b/ci/cfg/ci_sha3_sca_fvsr_cw310_ujson.yaml
@@ -3,7 +3,7 @@ target:
   fpga_bitstream: ../objs/lowrisc_systems_chip_earlgrey_cw310_0.1_kmac_dom.bit
   force_program_bitstream: False
   # fw_bin: ../objs/sha3_serial_fpga_cw310.bin
-  fw_bin: ../objs/sca_ujson_fpga_cw310.bin
+  fw_bin: ../objs/pentest_ujson_fpga_cw310_a1.bin
   target_clk_mult: 0.24
   target_freq: 24000000
   baudrate: 115200

diff --git a/ci/cfg/ci_sha3_sca_random_cw310_simpleserial.yaml b/ci/cfg/ci_sha3_sca_random_cw310_simpleserial.yaml
@@ -3,7 +3,7 @@ target:
   fpga_bitstream: ../objs/lowrisc_systems_chip_earlgrey_cw310_0.1_kmac_dom.bit
   force_program_bitstream: False
   fw_bin: ../objs/sha3_serial_fpga_cw310.bin
-  # fw_bin: ../objs/sca_ujson_fpga_cw310.bin
+  # fw_bin: ../objs/pentest_ujson_fpga_cw310_z1.bin
   target_clk_mult: 0.24
   target_freq: 24000000
   baudrate: 115200

diff --git a/ci/cfg/ci_sha3_sca_random_cw310_ujson.yaml b/ci/cfg/ci_sha3_sca_random_cw310_ujson.yaml
@@ -3,7 +3,7 @@ target:
   fpga_bitstream: ../objs/lowrisc_systems_chip_earlgrey_cw310_0.1_kmac_dom.bit
   force_program_bitstream: False
   # fw_bin: ../objs/sha3_serial_fpga_cw310.bin
-  fw_bin: ../objs/sca_ujson_fpga_cw310.bin
+  fw_bin: ../objs/pentest_ujson_fpga_cw310_a1.bin
   target_clk_mult: 0.24
   target_freq: 24000000
   baudrate: 115200

diff --git a/fault_injection/configs/pen.global_fi.crypto.aes.cw310.yaml b/fault_injection/configs/pen.global_fi.crypto.aes.cw310.yaml
@@ -1,8 +1,8 @@
 target:
   target_type: cw310
-  fpga_bitstream: "../objs/lowrisc_systems_chip_earlgrey_cw310_0.1.bit"
+  fpga_bitstream: "../objs/lowrisc_systems_chip_earlgrey_cw310_0.1_a1.bit"
   force_program_bitstream: False
-  fw_bin: "../objs/sca_ujson_fpga_cw310.bin"
+  fw_bin: "../objs/pentest_ujson_fpga_cw310_a1.bin"
   output_len_bytes: 16
   target_clk_mult: 0.24
   target_freq: 24000000

diff --git a/fault_injection/configs/pen.global_fi.crypto.kmac.cw310.yaml b/fault_injection/configs/pen.global_fi.crypto.kmac.cw310.yaml
@@ -1,8 +1,8 @@
 target:
   target_type: cw310
-  fpga_bitstream: "../objs/lowrisc_systems_chip_earlgrey_cw310_0.1.bit"
+  fpga_bitstream: "../objs/lowrisc_systems_chip_earlgrey_cw310_0.1_a1.bit"
   force_program_bitstream: False
-  fw_bin: "../objs/sca_ujson_fpga_cw310.bin"
+  fw_bin: "../objs/pentest_ujson_fpga_cw310_a1.bin"
   output_len_bytes: 16
   target_clk_mult: 0.24
   target_freq: 24000000

diff --git a/fault_injection/configs/pen.global_fi.crypto.shadow_reg_access.cw310.yaml b/fault_injection/configs/pen.global_fi.crypto.shadow_reg_access.cw310.yaml
@@ -1,8 +1,8 @@
 target:
   target_type: cw310
-  fpga_bitstream: "../objs/lowrisc_systems_chip_earlgrey_cw310_0.1.bit"
+  fpga_bitstream: "../objs/lowrisc_systems_chip_earlgrey_cw310_0.1_a1.bit"
   force_program_bitstream: False
-  fw_bin: "../objs/sca_ujson_fpga_cw310.bin"
+  fw_bin: "../objs/pentest_ujson_fpga_cw310_a1.bin"
   output_len_bytes: 16
   target_clk_mult: 0.24
   target_freq: 24000000

diff --git a/fault_injection/configs/pen.global_fi.ibex.address_translation.cw310.yaml b/fault_injection/configs/pen.global_fi.ibex.address_translation.cw310.yaml
@@ -1,8 +1,8 @@
 target:
   target_type: cw310
-  fpga_bitstream: "../objs/lowrisc_systems_chip_earlgrey_cw310_0.1.bit"
+  fpga_bitstream: "../objs/lowrisc_systems_chip_earlgrey_cw310_0.1_a1.bit"
   force_program_bitstream: False
-  fw_bin: "../objs/sca_ujson_fpga_cw310.bin"
+  fw_bin: "../objs/pentest_ujson_fpga_cw310_a1.bin"
   output_len_bytes: 16
   target_clk_mult: 0.24
   target_freq: 24000000

diff --git a/fault_injection/configs/pen.global_fi.ibex.address_translation_config.cw310.yaml b/fault_injection/configs/pen.global_fi.ibex.address_translation_config.cw310.yaml
@@ -1,8 +1,8 @@
 target:
   target_type: cw310
-  fpga_bitstream: "../objs/lowrisc_systems_chip_earlgrey_cw310_0.1.bit"
+  fpga_bitstream: "../objs/lowrisc_systems_chip_earlgrey_cw310_0.1_a1.bit"
   force_program_bitstream: False
-  fw_bin: "../objs/sca_ujson_fpga_cw310.bin"
+  fw_bin: "../objs/pentest_ujson_fpga_cw310_a1.bin"
   output_len_bytes: 16
   target_clk_mult: 0.24
   target_freq: 24000000

diff --git a/fault_injection/configs/pen.global_fi.ibex.char.conditional_branch.cw310.yaml b/fault_injection/configs/pen.global_fi.ibex.char.conditional_branch.cw310.yaml
@@ -1,8 +1,8 @@
 target:
   target_type: cw310
-  fpga_bitstream: "../objs/lowrisc_systems_chip_earlgrey_cw310_0.1.bit"
+  fpga_bitstream: "../objs/lowrisc_systems_chip_earlgrey_cw310_0.1_a1.bit"
   force_program_bitstream: False
-  fw_bin: "../objs/sca_ujson_fpga_cw310.bin"
+  fw_bin: "../objs/pentest_ujson_fpga_cw310_a1.bin"
   output_len_bytes: 16
   target_clk_mult: 0.24
   target_freq: 24000000

diff --git a/fault_injection/configs/pen.global_fi.ibex.char.csr_read.cw310.yaml b/fault_injection/configs/pen.global_fi.ibex.char.csr_read.cw310.yaml
@@ -1,8 +1,8 @@
 target:
   target_type: cw310
-  fpga_bitstream: "../objs/lowrisc_systems_chip_earlgrey_cw310_0.1.bit"
+  fpga_bitstream: "../objs/lowrisc_systems_chip_earlgrey_cw310_0.1_a1.bit"
   force_program_bitstream: False
-  fw_bin: "../objs/sca_ujson_fpga_cw310.bin"
+  fw_bin: "../objs/pentest_ujson_fpga_cw310_a1.bin"
   output_len_bytes: 16
   target_clk_mult: 0.24
   target_freq: 24000000

diff --git a/fault_injection/configs/pen.global_fi.ibex.char.csr_write.cw310.yaml b/fault_injection/configs/pen.global_fi.ibex.char.csr_write.cw310.yaml
@@ -1,8 +1,8 @@
 target:
   target_type: cw310
-  fpga_bitstream: "../objs/lowrisc_systems_chip_earlgrey_cw310_0.1.bit"
+  fpga_bitstream: "../objs/lowrisc_systems_chip_earlgrey_cw310_0.1_a1.bit"
   force_program_bitstream: False
-  fw_bin: "../objs/sca_ujson_fpga_cw310.bin"
+  fw_bin: "../objs/pentest_ujson_fpga_cw310_a1.bin"
   output_len_bytes: 16
   target_clk_mult: 0.24
   target_freq: 24000000

diff --git a/fault_injection/configs/pen.global_fi.ibex.char.flash_read.cw310.yaml b/fault_injection/configs/pen.global_fi.ibex.char.flash_read.cw310.yaml
@@ -1,8 +1,8 @@
 target:
   target_type: cw310
-  fpga_bitstream: "../objs/lowrisc_systems_chip_earlgrey_cw310_0.1.bit"
+  fpga_bitstream: "../objs/lowrisc_systems_chip_earlgrey_cw310_0.1_a1.bit"
   force_program_bitstream: False
-  fw_bin: "../objs/sca_ujson_fpga_cw310.bin"
+  fw_bin: "../objs/pentest_ujson_fpga_cw310_a1.bin"
   output_len_bytes: 16
   target_clk_mult: 0.24
   target_freq: 24000000

diff --git a/fault_injection/configs/pen.global_fi.ibex.char.flash_write.cw310.yaml b/fault_injection/configs/pen.global_fi.ibex.char.flash_write.cw310.yaml
@@ -1,8 +1,8 @@
 target:
   target_type: cw310
-  fpga_bitstream: "../objs/lowrisc_systems_chip_earlgrey_cw310_0.1.bit"
+  fpga_bitstream: "../objs/lowrisc_systems_chip_earlgrey_cw310_0.1_a1.bit"
   force_program_bitstream: False
-  fw_bin: "../objs/sca_ujson_fpga_cw310.bin"
+  fw_bin: "../objs/pentest_ujson_fpga_cw310_a1.bin"
   output_len_bytes: 16
   target_clk_mult: 0.24
   target_freq: 24000000

diff --git a/fault_injection/configs/pen.global_fi.ibex.char.hardened_check_eq_unimps.cw310.yaml b/fault_injection/configs/pen.global_fi.ibex.char.hardened_check_eq_unimps.cw310.yaml
@@ -1,8 +1,8 @@
 target:
   target_type: cw310
-  fpga_bitstream: "../objs/lowrisc_systems_chip_earlgrey_cw310_0.1.bit"
+  fpga_bitstream: "../objs/lowrisc_systems_chip_earlgrey_cw310_0.1_a1.bit"
   force_program_bitstream: False
-  fw_bin: "../objs/sca_ujson_fpga_cw310.bin"
+  fw_bin: "../objs/pentest_ujson_fpga_cw310_a1.bin"
   output_len_bytes: 16
   target_clk_mult: 0.24
   target_freq: 24000000

diff --git a/fault_injection/configs/pen.global_fi.ibex.char.mem_op_loop.cw310.yaml b/fault_injection/configs/pen.global_fi.ibex.char.mem_op_loop.cw310.yaml
@@ -1,8 +1,8 @@
 target:
   target_type: cw310
-  fpga_bitstream: "../objs/lowrisc_systems_chip_earlgrey_cw310_0.1.bit"
+  fpga_bitstream: "../objs/lowrisc_systems_chip_earlgrey_cw310_0.1_a1.bit"
   force_program_bitstream: False
-  fw_bin: "../objs/sca_ujson_fpga_cw310.bin"
+  fw_bin: "../objs/pentest_ujson_fpga_cw310_a1.bin"
   output_len_bytes: 16
   target_clk_mult: 0.24
   target_freq: 24000000

diff --git a/fault_injection/configs/pen.global_fi.ibex.char.reg_op_loop.cw310.yaml b/fault_injection/configs/pen.global_fi.ibex.char.reg_op_loop.cw310.yaml
@@ -1,8 +1,8 @@
 target:
   target_type: cw310
-  fpga_bitstream: "../objs/lowrisc_systems_chip_earlgrey_cw310_0.1.bit"
+  fpga_bitstream: "../objs/lowrisc_systems_chip_earlgrey_cw310_0.1_a1.bit"
   force_program_bitstream: False
-  fw_bin: "../objs/sca_ujson_fpga_cw310.bin"
+  fw_bin: "../objs/pentest_ujson_fpga_cw310_a1.bin"
   output_len_bytes: 16
   target_clk_mult: 0.24
   target_freq: 24000000

diff --git a/fault_injection/configs/pen.global_fi.ibex.char.register_file.cw310.yaml b/fault_injection/configs/pen.global_fi.ibex.char.register_file.cw310.yaml
@@ -1,8 +1,8 @@
 target:
   target_type: cw310
-  fpga_bitstream: "../objs/lowrisc_systems_chip_earlgrey_cw310_0.1.bit"
+  fpga_bitstream: "../objs/lowrisc_systems_chip_earlgrey_cw310_0.1_a1.bit"
   force_program_bitstream: False
-  fw_bin: "../objs/sca_ujson_fpga_cw310.bin"
+  fw_bin: "../objs/pentest_ujson_fpga_cw310_a1.bin"
   output_len_bytes: 16
   target_clk_mult: 0.24
   target_freq: 24000000

diff --git a/fault_injection/configs/pen.global_fi.ibex.char.register_file_read.cw310.yaml b/fault_injection/configs/pen.global_fi.ibex.char.register_file_read.cw310.yaml
@@ -1,8 +1,8 @@
 target:
   target_type: cw310
-  fpga_bitstream: "../objs/lowrisc_systems_chip_earlgrey_cw310_0.1.bit"
+  fpga_bitstream: "../objs/lowrisc_systems_chip_earlgrey_cw310_0.1_a1.bit"
   force_program_bitstream: False
-  fw_bin: "../objs/sca_ujson_fpga_cw310.bin"
+  fw_bin: "../objs/pentest_ujson_fpga_cw310_a1.bin"
   output_len_bytes: 16
   target_clk_mult: 0.24
   target_freq: 24000000