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This commit adds command handlers for the following tests: - otbn_key_sideload - otbn_load_integrity The device code is located in lowRISC/opentitan#21917. The binary was created from lowRISC/opentitan@55091e7 with ./bazelisk.sh build //sw/device/tests/crypto/cryptotest/firmware:firmware_fpga_cw310_test_rom Signed-off-by: Pascal Nasahl <nasahlpa@lowrisc.org>
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38 changes: 38 additions & 0 deletions
38
fault_injection/configs/pen.global_fi.otbn.key_sideload.cw310.yaml
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target: | ||
target_type: cw310 | ||
fpga_bitstream: "../objs/lowrisc_systems_chip_earlgrey_cw310_0.1.bit" | ||
force_program_bitstream: False | ||
fw_bin: "../objs/sca_ujson_fpga_cw310.bin" | ||
output_len_bytes: 16 | ||
target_clk_mult: 0.24 | ||
target_freq: 24000000 | ||
baudrate: 115200 | ||
protocol: "ujson" | ||
port: "/dev/ttyACM1" | ||
fisetup: | ||
fi_gear: "husky" | ||
fi_type: "voltage_glitch" | ||
# Voltage glitch width in cycles. | ||
glitch_width_min: 5 | ||
glitch_width_max: 150 | ||
glitch_width_step: 3 | ||
# Range for trigger delay in cycles. | ||
trigger_delay_min: 0 | ||
trigger_delay_max: 500 | ||
trigger_step: 10 | ||
# Number of iterations for the parameter sweep. | ||
num_iterations: 10000 | ||
fiproject: | ||
# Project database type and memory threshold. | ||
project_db: "ot_fi_project" | ||
project_mem_threshold: 10000 | ||
# Store FI plot. | ||
show_plot: True | ||
num_plots: 100 | ||
plot_x_axis: "trigger_delay" | ||
plot_x_axis_legend: "[cycles]" | ||
plot_y_axis: "glitch_width" | ||
plot_y_axis_legend: "[cycles]" | ||
test: | ||
which_test: "otbn_key_sideload" | ||
expected_result: '{"result":0,"err_status":0}' |
38 changes: 38 additions & 0 deletions
38
fault_injection/configs/pen.global_fi.otbn.load_integrity.cw310.yaml
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Original file line number | Diff line number | Diff line change |
---|---|---|
@@ -0,0 +1,38 @@ | ||
target: | ||
target_type: cw310 | ||
fpga_bitstream: "../objs/lowrisc_systems_chip_earlgrey_cw310_0.1.bit" | ||
force_program_bitstream: False | ||
fw_bin: "../objs/sca_ujson_fpga_cw310.bin" | ||
output_len_bytes: 16 | ||
target_clk_mult: 0.24 | ||
target_freq: 24000000 | ||
baudrate: 115200 | ||
protocol: "ujson" | ||
port: "/dev/ttyACM1" | ||
fisetup: | ||
fi_gear: "husky" | ||
fi_type: "voltage_glitch" | ||
# Voltage glitch width in cycles. | ||
glitch_width_min: 5 | ||
glitch_width_max: 150 | ||
glitch_width_step: 3 | ||
# Range for trigger delay in cycles. | ||
trigger_delay_min: 0 | ||
trigger_delay_max: 500 | ||
trigger_step: 10 | ||
# Number of iterations for the parameter sweep. | ||
num_iterations: 10000 | ||
fiproject: | ||
# Project database type and memory threshold. | ||
project_db: "ot_fi_project" | ||
project_mem_threshold: 10000 | ||
# Store FI plot. | ||
show_plot: True | ||
num_plots: 100 | ||
plot_x_axis: "trigger_delay" | ||
plot_x_axis_legend: "[cycles]" | ||
plot_y_axis: "glitch_width" | ||
plot_y_axis_legend: "[cycles]" | ||
test: | ||
which_test: "otbn_load_integrity" | ||
expected_result: '{"result":0,"err_status":0}' |
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