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[rom_ext] Update the ROM_EXT ePMP configuration #20862

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merged 1 commit into from
Jan 18, 2024

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cfrantz
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@cfrantz cfrantz commented Jan 17, 2024

To provide owner applications with a more flexible memory protection configuration, I have re-arranged the ePMP settings.

Notably:

  • The lockouts are moved to regions 0 & 1 to have the highest priority.
  • The full FLASH/MMIO/RAM windows have been moved to the end to allow finer grained controls to be applied in the middle entries.
  • The ROM_EXT region is moved and unlocked so owners can reclaim the ROM_EXT entries for their own use.
  • The owner code regions are left unlocked so owners can select their own preferred arrangement.

We jump to owner code with MML=0, allowing the owner to reconfigure the unlocked entries. The owner should set MML=1 if they need machine/user mode isolation.

To provide owner applications with a more flexible memory protection
configuration, I have re-arranged the ePMP settings.

Notably:
- The lockouts are moved to regions 0 & 1 to have the highest priority.
- The full FLASH/MMIO/RAM windows have been moved to the end to allow
  finer grained controls to be applied in the middle entries.
- The ROM_EXT region is moved and unlocked so owners can reclaim the
  ROM_EXT entries for their own use.
- The owner code regions are left unlocked so owners can select their
  own preferred arrangement.

We jump to owner code with MML=0, allowing the owner to reconfigure the
unlocked entries.  The owner should set MML=1 if they need machine/user
mode isolation.

Signed-off-by: Chris Frantz <[email protected]>
@cfrantz cfrantz requested a review from a team as a code owner January 17, 2024 21:23
@moidx moidx removed the request for review from a team January 17, 2024 22:39
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Thanks @cfrantz!

Can you also cherry pick this change to the earlgrey_es_sival branch?

CSR_CLEAR_BITS(CSR_REG_PMPCFG0, 0xff << 8);
CSR_SET_BITS(CSR_REG_PMPCFG0, (kEpmpModeTor | kEpmpPermLockedReadExecute)
<< 8);
#define EPMP_SET(cfg_reg, addr_reg, mask, cfg, addr) \
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The following may be enough to complete hardening for this given that in rom_ext_epmp_set() epmp_state is updated separately.

#define EPMP_SET(entry, cfg_reg, addr_reg, mask, cfg, addr) \
  ...
  HARDENED_CHECK_EQ(entry, cfg_reg); \
  ...

epmp_perm_t perm) {
uint32_t start = region.start >> 2;
uint32_t end = ((region.end + 3u) & ~3u) >> 2;
rom_ext_epmp_set(entry, kEpmpModeOff, start);
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Something that may help to harden this to have a separate mechanism to update epmp_state. It becomes turtles all the way down, which is part of the reason why sec_mmio uses macros to update the counters. Okay to skip this comment, but maybe we should add a note saying that we are planning to harden this later.

@cfrantz cfrantz merged commit 0f45b38 into lowRISC:master Jan 18, 2024
31 of 32 checks passed
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2 participants