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[fpga] Create splicing capability to init flash INFO pages #21225

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a-will opened this issue Feb 6, 2024 · 0 comments
Open

[fpga] Create splicing capability to init flash INFO pages #21225

a-will opened this issue Feb 6, 2024 · 0 comments
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Component:FPGA FPGA related issues Component:Tooling Issues related to tooling, e.g. tools/scripts for doc, code generation (docgen, reggen), CSR Priority:P4 Priority: propose to move to backlog
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Tooling Improvements

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@a-will
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a-will commented Feb 6, 2024

The FPGA has no backdoor interface to supply initial values for the flash INFO pages. Because the creator/owner seeds can be in the INFO pages, we can't test from some OTP states without getting flash_ctrl errors.

We may want to create the ability to splice the flash INFO pages, so a test can start from a fully provisioned state, avoiding a requirement to go through a provisioning process and life cycle transitions first.

From observations by @jdonjdon:
#20961 (comment)_
@a-will a-will added Component:FPGA FPGA related issues Component:Tooling Issues related to tooling, e.g. tools/scripts for doc, code generation (docgen, reggen), CSR Priority:P4 Priority: propose to move to backlog labels Feb 6, 2024
@a-will a-will added this to the Tooling Improvements milestone Feb 6, 2024
@jdonjdon jdonjdon mentioned this issue Mar 1, 2024
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@msfschaffner msfschaffner mentioned this issue Mar 8, 2024
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@jwnrt jwnrt mentioned this issue May 9, 2024
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@a-will a-will mentioned this issue Dec 7, 2024
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Component:FPGA FPGA related issues Component:Tooling Issues related to tooling, e.g. tools/scripts for doc, code generation (docgen, reggen), CSR Priority:P4 Priority: propose to move to backlog
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