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[sram_ctrl, sival] Enable CW340 ECC checks for scrambled access
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By enabling the SecureIbex parameter for CW340 (see
#25146), TLUL ECC errors now trigger an interrupt.
This commit modifies the scram_ctrl_scrambled_access test such
that the test checks whether we get the interrupt on CW340.

Signed-off-by: Pascal Nasahl <[email protected]>
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nasahlpa committed Dec 8, 2024
1 parent f2203ef commit d3c2540
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Showing 2 changed files with 6 additions and 4 deletions.
1 change: 1 addition & 0 deletions sw/device/tests/BUILD
Original file line number Diff line number Diff line change
Expand Up @@ -6603,6 +6603,7 @@ opentitan_test(
name = "sram_ctrl_scrambled_access_test",
srcs = ["sram_ctrl_scrambled_access_test.c"],
exec_env = dicts.add(
EARLGREY_CW340_TEST_ENVS,
EARLGREY_TEST_ENVS,
EARLGREY_SILICON_OWNER_ROM_EXT_ENVS,
),
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9 changes: 5 additions & 4 deletions sw/device/tests/sram_ctrl_scrambled_access_test.c
Original file line number Diff line number Diff line change
Expand Up @@ -267,16 +267,17 @@ static void check_sram_data(scramble_test_frame *mem_frame) {

// Decide whether to perform ECC error count checks after memory is scrambled.
//
// This is not done on FPGAs because the interrupt handler that counts them
// does not currently trigger on our FPGA platforms.
// See #20119 for more details.
// This is not done on CW305/CW310 FPGAs because interrupts for ECC errors are
// only triggered when the SecureIbex parameter is enabled. This parameter is
// disabled for these boards due to resource constraints. On CW340 and the
// other targets, this parameter is enabled.
bool check_ecc_errors = false;
switch (kDeviceType) {
case kDeviceFpgaCw305:
case kDeviceFpgaCw310:
case kDeviceFpgaCw340:
check_ecc_errors = false;
break;
case kDeviceFpgaCw340:
case kDeviceSilicon:
case kDeviceSimDV:
case kDeviceSimVerilator:
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