[topgen] Support for parametrized inter-module signals

Signed-off-by: Robert Schilling <[email protected]>
lowRISC · Nov 8, 2024 · ad6b2f4 · ad6b2f4
1 parent c0945f9
commit ad6b2f4
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Showing 10 changed files with 302 additions and 37 deletions.
diff --git a/hw/top_darjeeling/templates/toplevel.sv.tpl b/hw/top_darjeeling/templates/toplevel.sv.tpl
@@ -5,6 +5,7 @@ ${gencmd}
 <%
 import re
 import topgen.lib as lib
+from reggen.params import Parameter
 from topgen.clocks import Clocks
 from topgen.resets import Resets
 
@@ -22,7 +23,15 @@ num_dio_total = top['pinmux']['io_counts']['dedicated']['inouts'] + \
                 top['pinmux']['io_counts']['dedicated']['inputs'] + \
                 top['pinmux']['io_counts']['dedicated']['outputs']
 
-num_im = sum([x["width"] if "width" in x else 1 for x in top["inter_signal"]["external"]])
+num_im = 0
+for x in top["inter_signal"]["external"]:
+    if "width" in x:
+        if isinstance(x["width"], Parameter):
+            num_im += x["width"].default
+        else:
+            num_im += x["width"]
+    else:
+        num_im += 1
 
 max_sigwidth = max([x["width"] if "width" in x else 1 for x in top["pinmux"]["ios"]])
 max_sigwidth = len("{}".format(max_sigwidth))
@@ -54,7 +63,7 @@ module top_${top["name"]} #(
 <% continue %>
   % endif
   // parameters for ${m['name']}
-  % for p_exp in [p for p in m["param_list"] if p.get("expose") == "true" ]:
+  % for p_exp in [p for p in m["param_list"] if p.get("local") == "false" and p.get("expose") == "true" ]:
 <%
     p_type = p_exp.get('type')
     p_type_word = p_type + ' ' if p_type else ''
@@ -65,7 +74,7 @@ module top_${top["name"]} #(
     params_follow = not loop.last or loop.parent.index < last_modidx_with_params
     comma_char = ',' if params_follow else ''
 %>\
-    % if 12 + len(p_lhs) + 3 + len(p_rhs) + 1 < 100:
+    % if 12 + len(p_lhs) + 3 + len(str(p_rhs)) + 1 < 100:
   parameter ${p_lhs} = ${p_rhs}${comma_char}
     % else:
   parameter ${p_lhs} =
@@ -97,7 +106,11 @@ module top_${top["name"]} #(
 
   // Inter-module Signal External type
   % for sig in top["inter_signal"]["external"]:
+    % if isinstance(sig["width"], Parameter):
+  ${lib.get_direction(sig)} ${lib.im_defname(sig)} [${sig["width"].name_top}-1:0] ${sig["signame"]},
+    % else:
   ${lib.get_direction(sig)} ${lib.im_defname(sig)} ${lib.bitarray(sig["width"],1)} ${sig["signame"]},
+    % endif
   % endfor
 
 % endif
@@ -123,6 +136,29 @@ module top_${top["name"]} #(
   // Compile-time random constants
   import top_${top["name"]}_rnd_cnst_pkg::*;
 
+  // Local Parameters
+% for m in top["module"]:
+  % if not lib.is_inst(m):
+<% continue %>
+  % endif
+  // local parameters for ${m['name']}
+  % for p_exp in [p for p in m["param_list"] if p.get("local") == "true" and p.get("expose") == "true"]:
+<%
+    p_type = p_exp.get('type')
+    p_type_word = p_type + ' ' if p_type else ''
+
+    p_lhs = f'{p_type_word}{p_exp["name_top"]}'
+    p_rhs = p_exp['default']
+%>\
+    % if 13 + len(p_lhs) + 3 + len(str(p_rhs)) + 1 < 100:
+  localparam ${p_lhs} = ${p_rhs};
+    % else:
+  localparam ${p_lhs} =
+      ${p_rhs};
+    % endif
+  % endfor
+% endfor
+
   // Signals
   logic [${num_mio_inputs - 1}:0] mio_p2d;
   logic [${num_mio_outputs - 1}:0] mio_d2p;
@@ -189,7 +225,11 @@ module top_${top["name"]} #(
   // define inter-module signals
 % endif
 % for sig in top["inter_signal"]["definitions"]:
+  % if isinstance(sig["width"], Parameter):
+  ${lib.im_defname(sig)} [${sig["width"].name_top}-1:0] ${sig["signame"]};
+  % else:
   ${lib.im_defname(sig)} ${lib.bitarray(sig["width"],1)} ${sig["signame"]};
+  % endif
 % endfor
 
 ## Mixed connection to port
@@ -215,19 +255,28 @@ module top_${top["name"]} #(
 ## Partial inter-module definition tie-off
   // define partial inter-module tie-off
 % for sig in unused_im_defs:
-  % for idx in range(sig['end_idx'], sig['width']):
+<%
+  width = sig['width'].default if isinstance(sig['width'], Parameter) else sig['width']
+%>\
+  % for idx in range(sig['end_idx'], width):
   ${lib.im_defname(sig)} unused_${sig["signame"]}${idx};
   % endfor
 % endfor
 
   // assign partial inter-module tie-off
 % for sig in unused_im_defs:
-  % for idx in range(sig['end_idx'], sig['width']):
+<%
+  width = sig['width'].default if isinstance(sig['width'], Parameter) else sig['width']
+%>\
+  % for idx in range(sig['end_idx'], width):
   assign unused_${sig["signame"]}${idx} = ${sig["signame"]}[${idx}];
   % endfor
 % endfor
 % for sig in undriven_im_defs:
-  % for idx in range(sig['end_idx'], sig['width']):
+<%
+  width = sig['width'].default if isinstance(sig['width'], Parameter) else sig['width']
+%>\
+  % for idx in range(sig['end_idx'], width):
   assign ${sig["signame"]}[${idx}] = ${sig["default"]};
   % endfor
 % endfor