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[sival, spi_dev] Fix coding style syntax
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Signed-off-by: Douglas Reis <[email protected]>
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engdoreis committed Jan 15, 2024
1 parent 114700c commit 8ad34f8
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Showing 2 changed files with 36 additions and 35 deletions.
Original file line number Diff line number Diff line change
Expand Up @@ -49,7 +49,7 @@ class chip_sw_spi_device_tpm_vseq extends chip_sw_base_vseq;
cfg.m_spi_host_agent_cfg.csid = 1;

// enable spi agent interface to begin
`DV_WAIT(cfg.sw_logger_vif.printed_log == "Begin TPM Test",
`DV_WAIT(cfg.sw_logger_vif.printed_log == "SYNC: Begin TPM Test",
"Timedout waiting for spi host c configuration.")

for (int i = 0; i < 10; i++) begin
Expand Down
69 changes: 35 additions & 34 deletions sw/device/tests/sim_dv/spi_device_tpm_tx_rx_test.c
Original file line number Diff line number Diff line change
Expand Up @@ -30,11 +30,13 @@ typedef enum {
kTpmReadCommand = 0x80,
} tpm_cmd_t;

const static uint8_t kIterations = 10;
const static uint8_t kTpmCommandRwMask = 0x80;
const static uint8_t kTpmCommandSizeMask = 0x3f;
enum {
kIterations = 10,
kTpmCommandRwMask = 0x80,
kTpmCommandSizeMask = 0x3f,
};

const static dif_spi_device_tpm_config_t tpm_config = {
const static dif_spi_device_tpm_config_t kTpmConfig = {
.interface = kDifSpiDeviceTpmInterfaceCrb,
.disable_return_by_hardware = false,
.disable_address_prefix_check = false,
Expand All @@ -45,7 +47,7 @@ static volatile bool header_interrupt_received = false;
static void en_plic_irqs(dif_rv_plic_t *plic) {
// Enable functional interrupts as well as error interrupts to make sure
// everything is behaving as expected.
top_earlgrey_plic_irq_id_t plic_irqs[] = {
const top_earlgrey_plic_irq_id_t kIrqs[] = {
kTopEarlgreyPlicIrqIdSpiDeviceGenericRxFull,
kTopEarlgreyPlicIrqIdSpiDeviceGenericRxWatermark,
kTopEarlgreyPlicIrqIdSpiDeviceGenericTxWatermark,
Expand All @@ -59,13 +61,13 @@ static void en_plic_irqs(dif_rv_plic_t *plic) {
kTopEarlgreyPlicIrqIdSpiDeviceReadbufFlip,
kTopEarlgreyPlicIrqIdSpiDeviceTpmHeaderNotEmpty};

for (uint32_t i = 0; i < ARRAYSIZE(plic_irqs); ++i) {
for (uint32_t i = 0; i < ARRAYSIZE(kIrqs); ++i) {
CHECK_DIF_OK(dif_rv_plic_irq_set_enabled(
plic, plic_irqs[i], kTopEarlgreyPlicTargetIbex0, kDifToggleEnabled));
plic, kIrqs[i], kTopEarlgreyPlicTargetIbex0, kDifToggleEnabled));

// Assign a default priority
CHECK_DIF_OK(dif_rv_plic_irq_set_priority(plic, plic_irqs[i],
kDifRvPlicMaxPriority));
CHECK_DIF_OK(
dif_rv_plic_irq_set_priority(plic, kIrqs[i], kDifRvPlicMaxPriority));
}

// Enable the external IRQ at Ibex.
Expand All @@ -74,22 +76,21 @@ static void en_plic_irqs(dif_rv_plic_t *plic) {
}

static void en_spi_device_irqs(dif_spi_device_t *spi_device) {
dif_spi_device_irq_t spi_device_irqs[] = {
kDifSpiDeviceIrqGenericRxFull,
kDifSpiDeviceIrqGenericRxWatermark,
kDifSpiDeviceIrqGenericTxWatermark,
kDifSpiDeviceIrqGenericRxError,
kDifSpiDeviceIrqGenericRxOverflow,
kDifSpiDeviceIrqGenericTxUnderflow,
kDifSpiDeviceIrqUploadCmdfifoNotEmpty,
kDifSpiDeviceIrqUploadPayloadNotEmpty,
kDifSpiDeviceIrqUploadPayloadOverflow,
kDifSpiDeviceIrqReadbufWatermark,
kDifSpiDeviceIrqReadbufFlip,
kDifSpiDeviceIrqTpmHeaderNotEmpty};

for (uint32_t i = 0; i <= ARRAYSIZE(spi_device_irqs); ++i) {
CHECK_DIF_OK(dif_spi_device_irq_set_enabled(spi_device, spi_device_irqs[i],
const dif_spi_device_irq_t kIrqs[] = {kDifSpiDeviceIrqGenericRxFull,
kDifSpiDeviceIrqGenericRxWatermark,
kDifSpiDeviceIrqGenericTxWatermark,
kDifSpiDeviceIrqGenericRxError,
kDifSpiDeviceIrqGenericRxOverflow,
kDifSpiDeviceIrqGenericTxUnderflow,
kDifSpiDeviceIrqUploadCmdfifoNotEmpty,
kDifSpiDeviceIrqUploadPayloadNotEmpty,
kDifSpiDeviceIrqUploadPayloadOverflow,
kDifSpiDeviceIrqReadbufWatermark,
kDifSpiDeviceIrqReadbufFlip,
kDifSpiDeviceIrqTpmHeaderNotEmpty};

for (uint32_t i = 0; i <= ARRAYSIZE(kIrqs); ++i) {
CHECK_DIF_OK(dif_spi_device_irq_set_enabled(spi_device, kIrqs[i],
kDifToggleEnabled));
}
}
Expand Down Expand Up @@ -135,7 +136,7 @@ static void ack_spi_tpm_header_irq(dif_spi_device_handle_t *spi_device) {
}

// This routine is needed to make sure that an interrupt does not sneak in
// and jump excution away between the boolean check and the actual invocation
// and jump execution away between the boolean check and the actual invocation
// of wait_for_interrupt.
static void atomic_wait_for_interrupt(void) {
irq_global_ctrl(false);
Expand Down Expand Up @@ -174,25 +175,25 @@ bool test_main(void) {
&out_attr));

CHECK_DIF_OK(
dif_spi_device_tpm_configure(&spi_device, kDifToggleEnabled, tpm_config));
dif_spi_device_tpm_configure(&spi_device, kDifToggleEnabled, kTpmConfig));

// enable interrupts
en_plic_irqs(&plic);
en_spi_device_irqs(&spi_device.dev);

// Sync message with testbench to begin.
LOG_INFO("Begin TPM Test");
LOG_INFO("SYNC: Begin TPM Test");

for (uint32_t i = 0; i < kIterations; i++) {
LOG_INFO("Iteration %d", i);

// Wait for write interrupt.
atomic_wait_for_interrupt();

// Check what comamnd we have received. Store it as expected variables
// Check what command we have received. Store it as expected variables
// and compare when the read command is issued.
uint8_t write_command;
uint32_t write_addr;
uint8_t write_command = 0;
uint32_t write_addr = 0;
CHECK_DIF_OK(dif_spi_device_tpm_get_command(&spi_device, &write_command,
&write_addr));
CHECK((write_command & kTpmCommandRwMask) == kTpmWriteCommand,
Expand All @@ -202,7 +203,7 @@ bool test_main(void) {
uint32_t num_bytes = (write_command & kTpmCommandSizeMask) + 1;
LOG_INFO("Expecting %d bytes from tpm write", num_bytes);

uint8_t buf[64];
uint8_t buf[64] = {0};
dif_result_t status = kDifOutOfRange;
while (status == kDifOutOfRange) {
status = dif_spi_device_tpm_read_data(&spi_device, num_bytes, buf);
Expand All @@ -217,8 +218,8 @@ bool test_main(void) {
// Send the written data right back out for reads.
CHECK_DIF_OK(dif_spi_device_tpm_write_data(&spi_device, num_bytes, buf));

uint8_t read_command;
uint32_t read_addr;
uint8_t read_command = 0;
uint32_t read_addr = 0;
CHECK_DIF_OK(
dif_spi_device_tpm_get_command(&spi_device, &read_command, &read_addr));
ack_spi_tpm_header_irq(&spi_device);
Expand Down

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