[top/pads] Switch CC pins to 5V tolerant pad cells

Signed-off-by: Michael Schaffner <[email protected]>
lowRISC · Feb 28, 2024 · 32e8620 · 32e8620
1 parent 2cc7327
commit 32e8620
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Showing 5 changed files with 10 additions and 10 deletions.
diff --git a/hw/top_earlgrey/data/autogen/top_earlgrey.gen.hjson b/hw/top_earlgrey/data/autogen/top_earlgrey.gen.hjson
@@ -10629,7 +10629,7 @@
       }
       {
         name: CC1
-        type: InputStd
+        type: BidirTol
         bank: AVCC
         connection: manual
         desc: ADC input 1
@@ -10638,7 +10638,7 @@
       }
       {
         name: CC2
-        type: InputStd
+        type: BidirTol
         bank: AVCC
         connection: manual
         desc: ADC input 2

diff --git a/hw/top_earlgrey/data/top_earlgrey.hjson b/hw/top_earlgrey/data/top_earlgrey.hjson
@@ -1205,8 +1205,8 @@
       { name: 'POR_N'           , type: 'InputStd',     bank: 'VCC' , connection: 'manual', desc: 'System reset'},
       { name: 'USB_P'           , type: 'DualBidirTol', bank: 'VCC' , connection: 'manual', desc: 'USB P signal'},
       { name: 'USB_N'           , type: 'DualBidirTol', bank: 'VCC' , connection: 'manual', desc: 'USB N signal'},
-      { name: 'CC1'             , type: 'InputStd',     bank: 'AVCC', connection: 'manual', desc: 'ADC input 1', port_type: '`INOUT_AI'},
-      { name: 'CC2'             , type: 'InputStd',     bank: 'AVCC', connection: 'manual', desc: 'ADC input 2', port_type: '`INOUT_AI'},
+      { name: 'CC1'             , type: 'BidirTol',     bank: 'AVCC', connection: 'manual', desc: 'ADC input 1', port_type: '`INOUT_AI'},
+      { name: 'CC2'             , type: 'BidirTol',     bank: 'AVCC', connection: 'manual', desc: 'ADC input 2', port_type: '`INOUT_AI'},
       { name: 'FLASH_TEST_VOLT' , type: 'AnalogIn0',    bank: 'VCC' , connection: 'manual', desc: 'Flash test voltage input'},
       { name: 'FLASH_TEST_MODE0', type: 'InputStd',     bank: 'VCC' , connection: 'manual', desc: 'Flash test mode signal'},
       { name: 'FLASH_TEST_MODE1', type: 'InputStd',     bank: 'VCC' , connection: 'manual', desc: 'Flash test mode signal'},

diff --git a/hw/top_earlgrey/doc/design/README.md b/hw/top_earlgrey/doc/design/README.md
@@ -470,8 +470,8 @@ The first EDN instance, `u_edn0` is intended to be configured to deliver entropy
 | 0    | POR_N            | VCC    | InputStd     | manual            | System reset                               |
 | 1    | USB_P            | VCC    | DualBidirTol | manual            | USB P signal                               |
 | 2    | USB_N            | VCC    | DualBidirTol | manual            | USB N signal                               |
-| 3    | CC1              | AVCC   | InputStd     | manual            | ADC input 1                                |
-| 4    | CC2              | AVCC   | InputStd     | manual            | ADC input 2                                |
+| 3    | CC1              | AVCC   | BidirTol     | manual            | ADC input 1                                |
+| 4    | CC2              | AVCC   | BidirTol     | manual            | ADC input 2                                |
 | 5    | FLASH_TEST_VOLT  | VCC    | AnalogIn0    | manual            | Flash test voltage input                   |
 | 6    | FLASH_TEST_MODE0 | VCC    | InputStd     | manual            | Flash test mode signal                     |
 | 7    | FLASH_TEST_MODE1 | VCC    | InputStd     | manual            | Flash test mode signal                     |

diff --git a/hw/top_earlgrey/ip/pinmux/doc/autogen/pinout_asic.md b/hw/top_earlgrey/ip/pinmux/doc/autogen/pinout_asic.md
@@ -11,8 +11,8 @@ util/topgen.py -t hw/top_earlgrey/data/top_earlgrey.hjson -o hw/top_earlgrey/
 |      <p style="font-size:smaller">POR_N</p>       |   <p style="font-size:smaller">InputStd</p>   |  <p style="font-size:smaller">VCC</p>   |    <p style="font-size:smaller">manual</p>    |         <p style="font-size:smaller">-</p>          |                            <p style="font-size:smaller">- / -</p>                             |                <p style="font-size:smaller">System reset</p>                |
 |      <p style="font-size:smaller">USB_P</p>       | <p style="font-size:smaller">DualBidirTol</p> |  <p style="font-size:smaller">VCC</p>   |    <p style="font-size:smaller">manual</p>    |         <p style="font-size:smaller">-</p>          |                            <p style="font-size:smaller">- / -</p>                             |                <p style="font-size:smaller">USB P signal</p>                |
 |      <p style="font-size:smaller">USB_N</p>       | <p style="font-size:smaller">DualBidirTol</p> |  <p style="font-size:smaller">VCC</p>   |    <p style="font-size:smaller">manual</p>    |         <p style="font-size:smaller">-</p>          |                            <p style="font-size:smaller">- / -</p>                             |                <p style="font-size:smaller">USB N signal</p>                |
-|       <p style="font-size:smaller">CC1</p>        |   <p style="font-size:smaller">InputStd</p>   |  <p style="font-size:smaller">AVCC</p>  |    <p style="font-size:smaller">manual</p>    |         <p style="font-size:smaller">-</p>          |                            <p style="font-size:smaller">- / -</p>                             |                <p style="font-size:smaller">ADC input 1</p>                 |
-|       <p style="font-size:smaller">CC2</p>        |   <p style="font-size:smaller">InputStd</p>   |  <p style="font-size:smaller">AVCC</p>  |    <p style="font-size:smaller">manual</p>    |         <p style="font-size:smaller">-</p>          |                            <p style="font-size:smaller">- / -</p>                             |                <p style="font-size:smaller">ADC input 2</p>                 |
+|       <p style="font-size:smaller">CC1</p>        |   <p style="font-size:smaller">BidirTol</p>   |  <p style="font-size:smaller">AVCC</p>  |    <p style="font-size:smaller">manual</p>    |         <p style="font-size:smaller">-</p>          |                            <p style="font-size:smaller">- / -</p>                             |                <p style="font-size:smaller">ADC input 1</p>                 |
+|       <p style="font-size:smaller">CC2</p>        |   <p style="font-size:smaller">BidirTol</p>   |  <p style="font-size:smaller">AVCC</p>  |    <p style="font-size:smaller">manual</p>    |         <p style="font-size:smaller">-</p>          |                            <p style="font-size:smaller">- / -</p>                             |                <p style="font-size:smaller">ADC input 2</p>                 |
 | <p style="font-size:smaller">FLASH_TEST_VOLT</p>  |  <p style="font-size:smaller">AnalogIn0</p>   |  <p style="font-size:smaller">VCC</p>   |    <p style="font-size:smaller">manual</p>    |         <p style="font-size:smaller">-</p>          |                            <p style="font-size:smaller">- / -</p>                             |          <p style="font-size:smaller">Flash test voltage input</p>          |
 | <p style="font-size:smaller">FLASH_TEST_MODE0</p> |   <p style="font-size:smaller">InputStd</p>   |  <p style="font-size:smaller">VCC</p>   |    <p style="font-size:smaller">manual</p>    |         <p style="font-size:smaller">-</p>          |                            <p style="font-size:smaller">- / -</p>                             |           <p style="font-size:smaller">Flash test mode signal</p>           |
 | <p style="font-size:smaller">FLASH_TEST_MODE1</p> |   <p style="font-size:smaller">InputStd</p>   |  <p style="font-size:smaller">VCC</p>   |    <p style="font-size:smaller">manual</p>    |         <p style="font-size:smaller">-</p>          |                            <p style="font-size:smaller">- / -</p>                             |           <p style="font-size:smaller">Flash test mode signal</p>           |

diff --git a/hw/top_earlgrey/rtl/autogen/chip_earlgrey_asic.sv b/hw/top_earlgrey/rtl/autogen/chip_earlgrey_asic.sv
@@ -424,8 +424,8 @@ module chip_earlgrey_asic #(
       InputStd, // FLASH_TEST_MODE1
       InputStd, // FLASH_TEST_MODE0
       AnalogIn0, // FLASH_TEST_VOLT
-      InputStd, // CC2
-      InputStd, // CC1
+      BidirTol, // CC2
+      BidirTol, // CC1
       DualBidirTol, // USB_N
       DualBidirTol, // USB_P
       InputStd  // POR_N