[provisioning] make extension CA config optional #3573
timothytrippelci.yml
on: push
Lint (quick)
3m 38s
Earl Grey for CW310 Hyperdebug
/
Build bitstream
2m 28s
Lint (slow)
11m 48s
Build documentation
9m 3s
Airgapped build
14m 24s
Verible lint
0s
Run OTBN smoke Test
2m 58s
Run OTBN crypto tests
2m 59s
Verilated English Breakfast
9m 0s
Verilated Earl Grey
59m 54s
CW305's Bitstream
22m 16s
Build Docker Containers
3m 5s
Build and test software
16m 5s
CW340 Test ROM Tests
/
FPGA test
1m 5s
CW340 ROM Tests
/
FPGA test
1m 24s
CW340 ROM_EXT Tests
/
FPGA test
1m 8s
CW340 SiVal Tests
/
FPGA test
4m 42s
CW340 SiVal ROM_EXT Tests
/
FPGA test
1m 13s
CW340 Manufacturing Tests
/
FPGA test
10m 33s
CW310 SiVal Tests
/
FPGA test
35m 28s
CW310 SiVal ROM_EXT Tests
/
FPGA test
40m 18s
CW310 Manufacturing Tests
/
FPGA test
37m 39s
CW310 ROM_EXT Tests
/
FPGA test
15m 29s
CW310 Test ROM Tests
/
FPGA test
6m 50s
CW310 ROM Tests
/
FPGA test
27m 22s
CW310 ROM_EXT Tests
/
FPGA test
4m 58s
Cache bitstreams to GCP
4m 7s
Verify FPGA jobs
27s
Annotations
7 errors
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Lint (slow)
Process completed with exit code 1.
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Build and test software
Process completed with exit code 127.
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bash.sw/device/silicon_creator/manuf/base/cp_provision_functest_fpga_cw340_rom_with_fake_keys.bash:
bash#L1
exited with error code 142
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CW340 Manufacturing Tests / FPGA test
Process completed with exit code 3.
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CW310 Test ROM Tests / FPGA test
unable to access 'https://github.com/lowRISC/opentitan/': The requested URL returned error: 503
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CW310 Test ROM Tests / FPGA test
RPC failed; HTTP 503 curl 22 The requested URL returned error: 503
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CW310 Test ROM Tests / FPGA test
expected flush after ref listing
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Artifacts
Produced during runtime
| Name | Size | |
|---|---|---|
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chip_englishbreakfast_cw305
|
1.34 MB |
|
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execute_fpga_rom_ext_tests_cw310-targets
|
618 Bytes |
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execute_fpga_rom_ext_tests_cw310-test-results
|
48.8 KB |
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execute_manuf_fpga_tests_cw310-targets
|
655 Bytes |
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execute_manuf_fpga_tests_cw310-test-results
|
80 KB |
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execute_manuf_fpga_tests_cw340-targets
|
291 Bytes |
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execute_manuf_fpga_tests_cw340-test-results
|
29.1 KB |
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execute_rom_ext_fpga_tests_cw310-targets
|
325 Bytes |
|
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execute_rom_ext_fpga_tests_cw310-test-results
|
2.61 KB |
|
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execute_rom_ext_fpga_tests_cw340-targets
|
162 Bytes |
|
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execute_rom_ext_fpga_tests_cw340-test-results
|
201 Bytes |
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execute_rom_fpga_tests_cw310-targets
|
1.8 KB |
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execute_rom_fpga_tests_cw310-test-results
|
44.7 KB |
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execute_rom_fpga_tests_cw340-targets
|
162 Bytes |
|
|
execute_rom_fpga_tests_cw340-test-results
|
201 Bytes |
|
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execute_sival_fpga_tests_cw310-targets
|
931 Bytes |
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execute_sival_fpga_tests_cw310-test-results
|
71 KB |
|
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execute_sival_fpga_tests_cw340-targets
|
260 Bytes |
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execute_sival_fpga_tests_cw340-test-results
|
2.65 KB |
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execute_sival_rom_ext_fpga_tests_cw310-targets
|
2.39 KB |
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execute_sival_rom_ext_fpga_tests_cw310-test-results
|
178 KB |
|
|
execute_sival_rom_ext_fpga_tests_cw340-targets
|
162 Bytes |
|
|
execute_sival_rom_ext_fpga_tests_cw340-test-results
|
201 Bytes |
|
|
execute_test_rom_fpga_tests_cw310-targets
|
372 Bytes |
|
|
execute_test_rom_fpga_tests_cw310-test-results
|
51.6 KB |
|
|
execute_test_rom_fpga_tests_cw340-targets
|
162 Bytes |
|
|
execute_test_rom_fpga_tests_cw340-test-results
|
201 Bytes |
|
|
partial-build-bin-chip_earlgrey_cw310
|
6 MB |
|
|
partial-build-bin-chip_earlgrey_cw310_hyperdebug
|
6.05 MB |
|
|
partial-build-bin-chip_earlgrey_cw340
|
9.68 MB |
|
|
sw_build_test-test-results
|
59.7 KB |
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|
verilated_englishbreakfast
|
6.36 MB |
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|
verilator_earlgrey-test-results
|
8.87 KB |
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